Lines Matching +full:gpio +full:- +full:ranges +full:- +full:group +full:- +full:names
1 Specifying GPIO information for devices
5 -----------------
8 properties, each containing a 'gpio-list':
10 gpio-list ::= <single-gpio> [gpio-list]
11 single-gpio ::= <gpio-phandle> <gpio-specifier>
12 gpio-phandle : phandle to gpio controller node
13 gpio-specifier : Array of #gpio-cells specifying specific gpio
16 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
17 of this GPIO for the device. While a non-existent <name> is considered valid
21 GPIO properties can contain one or more GPIO phandles, but only in exceptional
30 The following example could be used to describe GPIO pins used as device enable
31 and bit-banged data signals:
34 gpio-controller
35 #gpio-cells = <2>;
38 gpio-controller
39 #gpio-cells = <1>;
43 enable-gpios = <&gpio2 2>;
44 data-gpios = <&gpio1 12 0>,
49 Note that gpio-specifier length is controller dependent. In the
50 above example, &gpio1 uses 2 cells to specify a gpio, while &gpio2
53 gpio-specifier may encode: bank, pin position inside the bank,
54 whether pin is open-drain and whether pin is logically inverted.
57 defined in include/dt-bindings/gpio/gpio.h whenever possible:
62 enable-gpios = <&qe_pio_e 18 GPIO_ACTIVE_HIGH>;
65 GPIO_ACTIVE_HIGH is 0, so in this example gpio-specifier is "18 0" and encodes
66 GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller.
68 1.1) GPIO specifier best practices
69 ----------------------------------
71 A gpio-specifier should contain a flag indicating the GPIO polarity; active-
72 high or active-low. If it does, the following best practices should be
75 The gpio-specifier's polarity flag should represent the physical level at the
76 GPIO controller that achieves (or represents, for inputs) a logically asserted
79 the GPIO controller and the device, then the gpio-specifier will represent the
91 a1) (Preferred) Dictated by a binding-specific DT property.
97 In particular, the polarity cannot be derived from the gpio-specifier, since
99 concepts of configurable signal polarity in the device, and possible board-
105 in the binding. The gpio-specifier should represent the polarity of the signal
106 (at the GPIO controller) assuming that the device is configured for this
109 responsible for correctly interpreting (inverting) the GPIO signal at the GPIO
112 2) gpio-controller nodes
113 ------------------------
115 Every GPIO controller node must contain both an empty "gpio-controller"
116 property, and a #gpio-cells integer property, which indicates the number of
117 cells in a gpio-specifier.
119 Example of two SOC GPIO banks defined as gpio-controller nodes:
121 qe_pio_a: gpio-controller@1400 {
122 compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
124 gpio-controller;
125 #gpio-cells = <2>;
128 qe_pio_e: gpio-controller@1460 {
129 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
131 gpio-controller;
132 #gpio-cells = <2>;
135 2.1) gpio- and pin-controller interaction
136 -----------------------------------------
138 Some or all of the GPIOs provided by a GPIO controller may be routed to pins
140 GPIO and other functions.
143 controllers. The gpio-ranges property described below represents this, and
146 gpio-range-list ::= <single-gpio-range> [gpio-range-list]
147 single-gpio-range ::= <numeric-gpio-range> | <named-gpio-range>
148 numeric-gpio-range ::=
149 <pinctrl-phandle> <gpio-base> <pinctrl-base> <count>
150 named-gpio-range ::= <pinctrl-phandle> <gpio-base> '<0 0>'
151 pinctrl-phandle : phandle to pin controller node
152 gpio-base : Base GPIO ID in the GPIO controller
153 pinctrl-base : Base pinctrl pin ID in the pin controller
157 described in ../pinctrl/pinctrl-bindings.txt.
159 In case named gpio ranges are used (ranges with both <pinctrl-base> and
160 <count> set to 0), the property gpio-ranges-group-names contains one string
161 for every single-gpio-range in gpio-ranges:
162 gpiorange-names-list ::= <gpiorange-name> [gpiorange-names-list]
163 gpiorange-name : Name of the pingroup associated to the GPIO range in
166 Elements of gpiorange-names-list corresponding to numeric ranges contain
167 the empty string. Elements of gpiorange-names-list corresponding to named
168 ranges contain the name of a pin group defined in the respective pin
170 that pin group.
173 were referenced by any gpio-ranges property to contain a property named
174 #gpio-range-cells with value <3>. This requirement is now deprecated.
181 qe_pio_e: gpio-controller@1460 {
182 #gpio-cells = <2>;
183 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
185 gpio-controller;
186 gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;
189 Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
195 gpio_pio_i: gpio-controller@14B0 {
196 #gpio-cells = <2>;
197 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
199 gpio-controller;
200 gpio-ranges = <&pinctrl1 0 20 10>,
204 gpio-ranges-group-names = "",
210 Here, three GPIO ranges are defined wrt. two pin controllers. pinctrl1 GPIO
211 ranges are defined using pin numbers whereas the GPIO ranges wrt. pinctrl2
214 3) GPIO hog definitions
215 -----------------------
217 The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism
218 providing automatic GPIO request and configuration as part of the
219 gpio-controller's driver probe function.
221 Each GPIO hog definition is represented as a child node of the GPIO controller.
223 - gpio-hog: A property specifying that this child node represents a GPIO hog.
224 - gpios: Store the GPIO information (id, flags) for the GPIO to
227 ! Not yet support more than one gpio !
230 - input: A property specifying to set the GPIO direction as input.
231 - output-low A property specifying to set the GPIO direction as output with
233 - output-high A property specifying to set the GPIO direction as output with
237 - line-name: The GPIO label name. If not present the node name is used.
244 #gpio-cells = <2>;
245 gpio-controller;
248 gpio-hog;
253 gpio-hog;
255 line-name = "foo-bar-gpio";
260 For the above Example you can than access the gpio in your boardcode