Lines Matching +full:pcf857x +full:- +full:compatible
1 * PCF857x-compatible I/O expanders
3 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
4 driven high by a pull-up current source or driven low to ground. This combines
14 - compatible: should be one of the following.
15 - "maxim,max7328": For the Maxim MAX7378
16 - "maxim,max7329": For the Maxim MAX7329
17 - "nxp,pca8574": For the NXP PCA8574
18 - "nxp,pca8575": For the NXP PCA8575
19 - "nxp,pca9670": For the NXP PCA9670
20 - "nxp,pca9671": For the NXP PCA9671
21 - "nxp,pca9672": For the NXP PCA9672
22 - "nxp,pca9673": For the NXP PCA9673
23 - "nxp,pca9674": For the NXP PCA9674
24 - "nxp,pca9675": For the NXP PCA9675
25 - "nxp,pcf8574": For the NXP PCF8574
26 - "nxp,pcf8574a": For the NXP PCF8574A
27 - "nxp,pcf8575": For the NXP PCF8575
28 - "ti,tca9554": For the TI TCA9554
30 - reg: I2C slave address.
32 - gpio-controller: Marks the device node as a gpio controller.
33 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
34 cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
39 - lines-initial-states: Bitmask that specifies the initial state of each
41 the input (pulled-up) state. When the bit is set to one, the line will be
42 initialized the low-level output state. If the property is not specified
49 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt.
51 - interrupt-controller: Identifies the node as an interrupt controller.
52 - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2.
53 - interrupt-parent: phandle of the parent interrupt controller.
54 - interrupts: Interrupt specifier for the controllers interrupt.
63 compatible = "nxp,pcf8575";
65 interrupt-parent = <&irqpin2>;
67 gpio-controller;
68 #gpio-cells = <2>;
69 interrupt-controller;
70 #interrupt-cells = <2>;