Lines Matching full:cs0
31 |Controller | None | 2x1 lower | 2x1 upper | {CS0+CS1}, | {CS0+CS1+ |
32 |Interleaving | | {CS0+CS1} | {CS2+CS3} | {CS2+CS3} | CS2+CS3} |
37 | |CS0 Only| | | {CS0+CS1} | |
40 | |CS0 Only| | | {CS0+CS1} | |
43 | |CS0 Only| | | {CS0+CS1} | |
46 | | | | | {CS0+CS1} | |
49 interleaving using "2x2" rank interleaving, it only interleaves {CS0+CS1}
94 # bank(chip-select) interleaving cs0+cs1
100 # bank(chip-select) interleaving (cs0+cs1) and (cs2+cs3) (2x2)
103 # bank(chip-select) interleaving (cs0+cs1+cs2+cs3) (4x1)
408 DDR Chip-Select Interleaving Mode: CS0+CS1