Lines Matching +full:system +full:- +full:ctl
1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
37 if (busdevfn == -1) { in universe_init()
39 return -1; in universe_init()
48 result = -1; in universe_init()
53 dev->busdevfn = busdevfn; in universe_init()
60 dev->uregs = (UNIVERSE *)val; in universe_init()
62 debug ("UNIVERSE-Base : %p\n", dev->uregs); in universe_init()
65 debug (" Read via mapping, PCI_ID = %08X\n", readl(&dev->uregs->pci_id)); in universe_init()
66 if (((PCI_DEVICE <<16) | PCI_VENDOR) != readl(&dev->uregs->pci_id)) { in universe_init()
67 printf ("UNIVERSE: Cannot read PCI-ID via Mapping: %08x\n", in universe_init()
68 readl(&dev->uregs->pci_id)); in universe_init()
69 result = -1; in universe_init()
73 debug ("PCI_BS = %08X\n", readl(&dev->uregs->pci_bs)); in universe_init()
75 dev->pci_bs = readl(&dev->uregs->pci_bs); in universe_init()
79 writel(0x00800000, &dev->uregs->lsi[j].ctl); in universe_init()
80 writel(0x00800000, &dev->uregs->vsi[j].ctl); in universe_init()
85 * Set VME Bus Time-out in universe_init()
89 writel(0x15040000 | (readl(&dev->uregs->misc_ctl) & 0x00020000), &dev->uregs->misc_ctl); in universe_init()
91 if (readl(&dev->uregs->misc_ctl) & 0x00020000) { in universe_init()
92 debug ("System Controller!\n"); /* test-only */ in universe_init()
94 debug ("Not System Controller!\n"); /* test-only */ in universe_init()
100 writel(0x00000000,&dev->uregs->lint_en); /* Disable interrupts in the Universe first */ in universe_init()
101 writel(0x0000FFFF,&dev->uregs->lint_stat); /* Clear Any Pending Interrupts */ in universe_init()
103 writel(0x0000, &dev->uregs->lint_map0); /* Map all ints to 0 */ in universe_init()
104 writel(0x0000, &dev->uregs->lint_map1); /* Map all ints to 0 */ in universe_init()
117 * Create pci slave window (access: pci -> vme)
122 unsigned int ctl = 0; in universe_pci_slave_window() local
125 result = -1; in universe_pci_slave_window()
130 if (0x00800000 == readl(&dev->uregs->lsi[i].ctl)) in universe_pci_slave_window()
136 result = -1; in universe_pci_slave_window()
142 writel(pciAddr , &dev->uregs->lsi[i].bs); in universe_pci_slave_window()
143 writel((pciAddr + size), &dev->uregs->lsi[i].bd); in universe_pci_slave_window()
144 writel((vmeAddr - pciAddr), &dev->uregs->lsi[i].to); in universe_pci_slave_window()
148 ctl = 0x00000000; in universe_pci_slave_window()
151 ctl = 0x00010000; in universe_pci_slave_window()
154 ctl = 0x00020000; in universe_pci_slave_window()
160 ctl |= 0x00000000; in universe_pci_slave_window()
163 ctl |= 0x00008000; in universe_pci_slave_window()
168 ctl |= 0x00001000; in universe_pci_slave_window()
174 ctl |= 0x00000000; in universe_pci_slave_window()
177 ctl |= 0x00400000; in universe_pci_slave_window()
180 ctl |= 0x00800000; in universe_pci_slave_window()
186 ctl |= 0x00000000; in universe_pci_slave_window()
189 ctl |= 0x00000001; in universe_pci_slave_window()
192 ctl |= 0x00000002; in universe_pci_slave_window()
196 ctl |= 0x80000000; /* enable */ in universe_pci_slave_window()
198 writel(ctl, &dev->uregs->lsi[i].ctl); in universe_pci_slave_window()
200 debug ("universe: window-addr=%p\n", &dev->uregs->lsi[i].ctl); in universe_pci_slave_window()
201 debug ("universe: pci slave window[%d] ctl=%08x\n", i, readl(&dev->uregs->lsi[i].ctl)); in universe_pci_slave_window()
202 debug ("universe: pci slave window[%d] bs=%08x\n", i, readl(&dev->uregs->lsi[i].bs)); in universe_pci_slave_window()
203 debug ("universe: pci slave window[%d] bd=%08x\n", i, readl(&dev->uregs->lsi[i].bd)); in universe_pci_slave_window()
204 debug ("universe: pci slave window[%d] to=%08x\n", i, readl(&dev->uregs->lsi[i].to)); in universe_pci_slave_window()
209 return -result; in universe_pci_slave_window()
214 * Create vme slave window (access: vme -> pci)
219 unsigned int ctl = 0; in universe_vme_slave_window() local
222 result = -1; in universe_vme_slave_window()
227 if (0x00800000 == readl(&dev->uregs->vsi[i].ctl)) in universe_vme_slave_window()
233 result = -1; in universe_vme_slave_window()
239 writel(vmeAddr , &dev->uregs->vsi[i].bs); in universe_vme_slave_window()
240 writel((vmeAddr + size), &dev->uregs->vsi[i].bd); in universe_vme_slave_window()
241 writel((pciAddr - vmeAddr), &dev->uregs->vsi[i].to); in universe_vme_slave_window()
245 ctl = 0x00000000; in universe_vme_slave_window()
248 ctl = 0x00010000; in universe_vme_slave_window()
251 ctl = 0x00020000; in universe_vme_slave_window()
257 ctl |= 0x00000000; in universe_vme_slave_window()
260 ctl |= 0x00800000; in universe_vme_slave_window()
265 ctl |= 0x00100000; in universe_vme_slave_window()
271 ctl |= 0x00000000; in universe_vme_slave_window()
274 ctl |= 0x00000001; in universe_vme_slave_window()
277 ctl |= 0x00000002; in universe_vme_slave_window()
281 ctl |= 0x80f00000; /* enable */ in universe_vme_slave_window()
283 writel(ctl, &dev->uregs->vsi[i].ctl); in universe_vme_slave_window()
285 debug ("universe: window-addr=%p\n", &dev->uregs->vsi[i].ctl); in universe_vme_slave_window()
286 debug ("universe: vme slave window[%d] ctl=%08x\n", i, readl(&dev->uregs->vsi[i].ctl)); in universe_vme_slave_window()
287 debug ("universe: vme slave window[%d] bs=%08x\n", i, readl(&dev->uregs->vsi[i].bs)); in universe_vme_slave_window()
288 debug ("universe: vme slave window[%d] bd=%08x\n", i, readl(&dev->uregs->vsi[i].bd)); in universe_vme_slave_window()
289 debug ("universe: vme slave window[%d] to=%08x\n", i, readl(&dev->uregs->vsi[i].to)); in universe_vme_slave_window()
294 return -result; in universe_vme_slave_window()
327 printf("Configuring Universe VME Slave Window (VME->PCI):\n"); in do_universe()
333 printf("Configuring Universe PCI Slave Window (PCI->VME):\n"); in do_universe()
350 " - initialize universe\n"
352 " - create vme slave window (access: vme->pci)\n"
354 " - create pci slave window (access: pci->vme)\n"
355 " [vam] = VMEbus Address-Modifier: 01 -> A16 Address Space\n"
356 " 02 -> A24 Address Space\n"
357 " 03 -> A32 Address Space\n"
358 " 04 -> Supervisor AM Code\n"
359 " 10 -> Data AM Code\n"
360 " 20 -> Program AM Code\n"
361 " [pms] = PCI Memory Space: 01 -> Memory Space\n"
362 " 02 -> I/O Space\n"
363 " 03 -> Configuration Space\n"
364 " [vdw] = VMEbus Maximum Datawidth: 01 -> D8 Data Width\n"
365 " 02 -> D16 Data Width\n"
366 " 03 -> D32 Data Width"