43 	busdevfn = pci_find_device(LPCI_VENDOR, LPCI_DEVICE, 0);  in tsi148_init()
50 	pci_write_config_dword(busdevfn, 0x0c, 0);  in tsi148_init()
58 	memset(dev, 0, sizeof(*dev));  in tsi148_init()
62 	val &= ~0xf;  in tsi148_init()
82 	for (j = 0; j < 8; j++) {  in tsi148_init()
83 		__raw_writel(htonl(0x00000000), &dev->uregs->outbound[j].otat);  in tsi148_init()
84 		__raw_writel(htonl(0x00000000), &dev->uregs->inbound[j].itat);  in tsi148_init()
88 	__raw_writel(htonl(0x00000084), &dev->uregs->vctrl);  in tsi148_init()
91 	if ((__raw_readl(&dev->uregs->vstat) & 0x00000100) != 0)  in tsi148_init()
101 	__raw_writel(htonl(0x00000000), &dev->uregs->inten);  in tsi148_init()
103 	__raw_writel(htonl(0x00000000), &dev->uregs->inteo);  in tsi148_init()
106 	__raw_writel(htonl(0x03ff3f00), &dev->uregs->intc);  in tsi148_init()
107 	/* Map all ints to 0 */  in tsi148_init()
108 	__raw_writel(htonl(0x00000000), &dev->uregs->intm1);  in tsi148_init()
109 	__raw_writel(htonl(0x00000000), &dev->uregs->intm2);  in tsi148_init()
113 	val &= ~(0x00004000);  in tsi148_init()
119 	return 0;  in tsi148_init()
135 	unsigned int ctl = 0;  in tsi148_pci_slave_window()
142 	for (i = 0; i < 8; i++) {  in tsi148_pci_slave_window()
143 		if (0x00000000 == readl(&dev->uregs->outbound[i].otat))  in tsi148_pci_slave_window()
158 	__raw_writel(0x00000000, &dev->uregs->outbound[i].otsau);  in tsi148_pci_slave_window()
160 	__raw_writel(0x00000000, &dev->uregs->outbound[i].oteau);  in tsi148_pci_slave_window()
162 	__raw_writel(0x00000000, &dev->uregs->outbound[i].otofu);  in tsi148_pci_slave_window()
166 		ctl = 0x00000000;  in tsi148_pci_slave_window()
169 		ctl = 0x00000001;  in tsi148_pci_slave_window()
172 		ctl = 0x00000002;  in tsi148_pci_slave_window()
178 		ctl |= 0x00000000;  in tsi148_pci_slave_window()
181 		ctl |= 0x00000010;  in tsi148_pci_slave_window()
186 		ctl |= 0x00000020;  in tsi148_pci_slave_window()
190 		ctl |= 0x00000000;  in tsi148_pci_slave_window()
193 		ctl |= 0x00000040;  in tsi148_pci_slave_window()
197 	ctl |= 0x80040000;	/* enable, no prefetch */  in tsi148_pci_slave_window()
212 	return 0;  in tsi148_pci_slave_window()
220 	unsigned int ctl = 0;  in tsi148_eval_vam()
224 		ctl = 0x00000000;  in tsi148_eval_vam()
227 		ctl = 0x00000010;  in tsi148_eval_vam()
230 		ctl = 0x00000020;  in tsi148_eval_vam()
235 		ctl |= 0x00000001;  in tsi148_eval_vam()
238 		ctl |= 0x00000002;  in tsi148_eval_vam()
241 		ctl |= 0x00000003;  in tsi148_eval_vam()
246 		ctl |= 0x00000008;  in tsi148_eval_vam()
248 		ctl |= 0x00000004;  in tsi148_eval_vam()
260 	unsigned int ctl = 0;  in tsi148_vme_slave_window()
267 	for (i = 0; i < 8; i++) {  in tsi148_vme_slave_window()
268 		if (0x00000000 == readl(&dev->uregs->inbound[i].itat))  in tsi148_vme_slave_window()
281 	__raw_writel(0x00000000, &dev->uregs->inbound[i].itsau);  in tsi148_vme_slave_window()
283 	__raw_writel(0x00000000, &dev->uregs->inbound[i].iteau);  in tsi148_vme_slave_window()
286 		__raw_writel(0xffffffff, &dev->uregs->inbound[i].itofu);  in tsi148_vme_slave_window()
288 		__raw_writel(0x00000000, &dev->uregs->inbound[i].itofu);  in tsi148_vme_slave_window()
291 	ctl |= 0x80000000;	/* enable */  in tsi148_vme_slave_window()
305 	return 0;  in tsi148_vme_slave_window()
319 	result = 0;  in tsi148_vme_gcsr_window()
325 		__raw_writel(0x00000000, &dev->uregs->gbau);  in tsi148_vme_gcsr_window()
328 		ctl |= 0x00000080;	/* enable */  in tsi148_vme_gcsr_window()
343 	result = 0;  in tsi148_vme_crcsr_window()
349 		__raw_writel(0x00000000, &dev->uregs->crou);  in tsi148_vme_crcsr_window()
351 		ctl = 0x00000080;	/* enable */  in tsi148_vme_crcsr_window()
366 	result = 0;  in tsi148_vme_crg_window()
372 		__raw_writel(0x00000000, &dev->uregs->cbau);  in tsi148_vme_crg_window()
375 		ctl |= 0x00000080;	/* enable */  in tsi148_vme_crg_window()
387 	ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, vdw = 0;  in do_tsi148()
392 		cmd = argv[1][0];  in do_tsi148()
406 		if (strcmp(argv[1], "crg") == 0) {  in do_tsi148()
444 	return 0;  in do_tsi148()