Lines Matching +full:0 +full:x01
37 { 15, 15, 0x01, "reset" },
38 { 14, 14, 0x01, "loopback" },
39 { 13, 6, 0x81, "speed selection" }, /* special */
40 { 12, 12, 0x01, "A/N enable" },
41 { 11, 11, 0x01, "power-down" },
42 { 10, 10, 0x01, "isolate" },
43 { 9, 9, 0x01, "restart A/N" },
44 { 8, 8, 0x01, "duplex" }, /* special */
45 { 7, 7, 0x01, "collision test enable" },
46 { 5, 0, 0x3f, "(reserved)" }
50 { 15, 15, 0x01, "100BASE-T4 able" },
51 { 14, 14, 0x01, "100BASE-X full duplex able" },
52 { 13, 13, 0x01, "100BASE-X half duplex able" },
53 { 12, 12, 0x01, "10 Mbps full duplex able" },
54 { 11, 11, 0x01, "10 Mbps half duplex able" },
55 { 10, 10, 0x01, "100BASE-T2 full duplex able" },
56 { 9, 9, 0x01, "100BASE-T2 half duplex able" },
57 { 8, 8, 0x01, "extended status" },
58 { 7, 7, 0x01, "(reserved)" },
59 { 6, 6, 0x01, "MF preamble suppression" },
60 { 5, 5, 0x01, "A/N complete" },
61 { 4, 4, 0x01, "remote fault" },
62 { 3, 3, 0x01, "A/N able" },
63 { 2, 2, 0x01, "link status" },
64 { 1, 1, 0x01, "jabber detect" },
65 { 0, 0, 0x01, "extended capabilities" },
69 { 15, 0, 0xffff, "OUI portion" },
73 { 15, 10, 0x3f, "OUI portion" },
74 { 9, 4, 0x3f, "manufacturer part number" },
75 { 3, 0, 0x0f, "manufacturer rev. number" },
79 { 15, 15, 0x01, "next page able" },
80 { 14, 14, 0x01, "(reserved)" },
81 { 13, 13, 0x01, "remote fault" },
82 { 12, 12, 0x01, "(reserved)" },
83 { 11, 11, 0x01, "asymmetric pause" },
84 { 10, 10, 0x01, "pause enable" },
85 { 9, 9, 0x01, "100BASE-T4 able" },
86 { 8, 8, 0x01, "100BASE-TX full duplex able" },
87 { 7, 7, 0x01, "100BASE-TX able" },
88 { 6, 6, 0x01, "10BASE-T full duplex able" },
89 { 5, 5, 0x01, "10BASE-T able" },
90 { 4, 0, 0x1f, "xxx to do" },
94 { 15, 15, 0x01, "next page able" },
95 { 14, 14, 0x01, "acknowledge" },
96 { 13, 13, 0x01, "remote fault" },
97 { 12, 12, 0x01, "(reserved)" },
98 { 11, 11, 0x01, "asymmetric pause able" },
99 { 10, 10, 0x01, "pause able" },
100 { 9, 9, 0x01, "100BASE-T4 able" },
101 { 8, 8, 0x01, "100BASE-X full duplex able" },
102 { 7, 7, 0x01, "100BASE-TX able" },
103 { 6, 6, 0x01, "10BASE-T full duplex able" },
104 { 5, 5, 0x01, "10BASE-T able" },
105 { 4, 0, 0x1f, "xxx to do" },
138 for (i = 0; i < 6; i++) { in MII_dump_0_to_5()
157 for (i = 0; i < pdl->len; i++) { in dump_reg()
187 ** 2.15-0
188 ** 3.15-0
189 ** 4.4-0
190 ** 5.4-0
218 else if ((regno == MII_ADVERTISE) && (pdesc->lo == 0)) { in special_field()
230 else if ((regno == MII_LPA) && (pdesc->lo == 0)) { in special_field()
242 return 0; in special_field()
276 int rcode = 0; in do_mii()
290 op[0] = last_op[0]; in do_mii()
299 if ((flag & CMD_FLAG_REPEAT) == 0) { in do_mii()
300 op[0] = argv[1][0]; in do_mii()
304 op[1] = '\0'; in do_mii()
317 printf("Incorrect PHY address. Range should be 0-31\n"); in do_mii()
327 if (op[0] == 'i') { in do_mii()
334 * Look for any and all PHYs. Valid addresses are 0..31. in do_mii()
339 start = 0; end = 31; in do_mii()
343 if (miiphy_info (devname, j, &oui, &model, &rev) == 0) { in do_mii()
344 printf("PHY 0x%02X: " in do_mii()
345 "OUI = 0x%04X, " in do_mii()
346 "Model = 0x%02X, " in do_mii()
347 "Rev = 0x%02X, " in do_mii()
357 } else if (op[0] == 'r') { in do_mii()
360 data = 0xffff; in do_mii()
361 if (miiphy_read (devname, addr, reg, &data) != 0) { in do_mii()
370 printf("%04X\n", data & 0x0000FFFF); in do_mii()
376 } else if (op[0] == 'w') { in do_mii()
379 if (miiphy_write (devname, addr, reg, data) != 0) { in do_mii()
386 } else if (op[0] == 'm') { in do_mii()
389 unsigned short val = 0; in do_mii()
408 } else if (strncmp(op, "du", 2) == 0) { in do_mii()
414 "standard MII registers, 0-5.\n"); in do_mii()
419 if (miiphy_read(devname, addr, reg, ®s[reg]) != 0) { in do_mii()
420 ok = 0; in do_mii()
431 } else if (strncmp(op, "de", 2) == 0) { in do_mii()
443 last_op[0] = op[0]; in do_mii()
467 "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"