Lines Matching +full:aldps +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0+
63 //------------------------------------------------------------
65 //------------------------------------------------------------
71 if (eng->env.is_new_mdio_reg[eng->run.mdio_idx]) { in phy_write()
73 MDIO_SET_PHY_ADDR(eng->phy.Adr) | in phy_write()
75 writel(wr_data, eng->run.mdio_base); in phy_write()
76 /* check time-out */ in phy_write()
77 while (readl(eng->run.mdio_base) & MDIO_FIRE_BUSY) { in phy_write()
79 if (!eng->run.tm_tx_only) in phy_write()
81 "[PHY-Write] Time out: %08x\n", in phy_write()
82 readl(eng->run.mdio_base)); in phy_write()
89 writel(data, eng->run.mdio_base + 0x4); in phy_write()
91 MDIO_SET_PHY_ADDR_OLD(eng->phy.Adr) | in phy_write()
93 eng->run.mdio_base); in phy_write()
95 while (readl(eng->run.mdio_base) & MDIO_WR_CODE_OLD) { in phy_write()
97 if (!eng->run.tm_tx_only) in phy_write()
99 "[PHY-Write] Time out: %08x\n", in phy_write()
100 readl(eng->run.mdio_base)); in phy_write()
106 } // End if (eng->env.new_mdio_reg) in phy_write()
110 eng->phy.Adr, eng->run.mdio_base); in phy_write()
111 if (!eng->run.tm_tx_only) in phy_write()
113 data, eng->phy.Adr, eng->run.mdio_base); in phy_write()
118 //------------------------------------------------------------
130 if (eng->env.is_new_mdio_reg[eng->run.mdio_idx]) { in phy_read()
131 writel(MDIO_RD_CODE | MDIO_SET_PHY_ADDR(eng->phy.Adr) | in phy_read()
133 eng->run.mdio_base); in phy_read()
135 while (readl(eng->run.mdio_base) & MDIO_FIRE_BUSY) { in phy_read()
137 if (!eng->run.tm_tx_only) in phy_read()
139 "[PHY-Read] Time out: %08x\n", in phy_read()
140 readl(eng->run.mdio_base)); in phy_read()
150 read_value = readl(eng->run.mdio_base + 0x4) & GENMASK(15, 0); in phy_read()
153 MDIO_SET_PHY_ADDR_OLD(eng->phy.Adr) | in phy_read()
155 eng->run.mdio_base); in phy_read()
157 while (readl(eng->run.mdio_base) & MDIO_RD_CODE_OLD) { in phy_read()
159 if (!eng->run.tm_tx_only) in phy_read()
161 "[PHY-Read] Time out: %08x\n", in phy_read()
162 readl(eng->run.mdio_base)); in phy_read()
172 read_value = readl(eng->run.mdio_base + 0x4) >> 16; in phy_read()
178 eng->phy.Adr, eng->run.mdio_base); in phy_read()
179 if (!eng->run.tm_tx_only) in phy_read()
181 read_value, eng->phy.Adr, eng->run.mdio_base); in phy_read()
187 //------------------------------------------------------------
192 clr_mask, set_mask, eng->phy.Adr, eng->run.mdio_base); in phy_clrset()
193 if (!eng->run.tm_tx_only) in phy_clrset()
196 adr, clr_mask, set_mask, eng->phy.Adr, in phy_clrset()
197 eng->run.mdio_base); in phy_clrset()
202 //------------------------------------------------------------
207 printf("[PHY%d][%d]----------------\n", eng->run.mac_idx + 1, in phy_dump()
208 eng->phy.Adr); in phy_dump()
217 //------------------------------------------------------------
222 phy_addr_orig = eng->phy.Adr; in phy_scan_id()
223 for (eng->phy.Adr = 0; eng->phy.Adr < 32; eng->phy.Adr++) { in phy_scan_id()
224 PRINTF(option, "[%02d] ", eng->phy.Adr); in phy_scan_id()
228 if ((eng->phy.Adr % 4) == 3) in phy_scan_id()
231 eng->phy.Adr = phy_addr_orig; in phy_scan_id()
234 //------------------------------------------------------------
246 //------------------------------------------------------------
248 //------------------------------------------------------------
253 phy_clrset(eng, 0, clr, eng->phy.PHY_00h); in phy_basic_setting()
256 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_basic_setting()
257 eng->run.mdio_base); in phy_basic_setting()
258 if (!eng->run.tm_tx_only) in phy_basic_setting()
260 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_basic_setting()
261 eng->run.mdio_base); in phy_basic_setting()
265 //------------------------------------------------------------
272 if (!eng->run.tm_tx_only) in phy_wait_reset_done()
273 PRINTF(FP_LOG, "[PHY-Reset] Time out: %08x\n", in phy_wait_reset_done()
274 readl(eng->run.mdio_base)); in phy_wait_reset_done()
283 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_wait_reset_done()
284 eng->run.mdio_base); in phy_wait_reset_done()
285 if (!eng->run.tm_tx_only) in phy_wait_reset_done()
287 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_wait_reset_done()
288 eng->run.mdio_base); in phy_wait_reset_done()
295 //------------------------------------------------------------
300 //phy_clrset(eng, 0, 0x0000, 0x8000 | eng->phy.PHY_00h); in phy_reset()
301 phy_clrset(eng, 0, 0x7140, 0x8000 | eng->phy.PHY_00h); in phy_reset()
311 //------------------------------------------------------------
335 //------------------------------------------------------------
337 //------------------------------------------------------------
339 if ( eng->run.tm_tx_only ) { in recov_phy_marvell()
341 else if ( eng->phy.loopback ) { in recov_phy_marvell()
344 if (eng->run.speed_sel[0]) { in recov_phy_marvell()
345 phy_write(eng, 9, eng->phy.PHY_09h); in recov_phy_marvell()
356 phy_write(eng, 18, eng->phy.PHY_12h); in recov_phy_marvell()
361 //------------------------------------------------------------
364 if ( eng->run.tm_tx_only ) { in phy_marvell()
367 else if ( eng->phy.loopback ) { in phy_marvell()
371 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell()
372 eng->phy.PHY_09h = phy_read( eng, PHY_GBCR ); in phy_marvell()
373 eng->phy.PHY_12h = phy_read( eng, PHY_INER ); in phy_marvell()
380 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell()
390 if ( !eng->phy.loopback ) in phy_marvell()
391 phy_check_register ( eng, 17, 0x0400, 0x0400, 1, "wait 88E1111 link-up"); in phy_marvell()
394 // eng->phy.PHY_11h = phy_read( eng, PHY_SR ); in phy_marvell()
395 // } while ( !( ( eng->phy.PHY_11h & 0x0400 ) | eng->phy.loopback | ( Retry++ > 20 ) ) ); in phy_marvell()
398 //------------------------------------------------------------
400 if ( eng->run.tm_tx_only ) { in recov_phy_marvell0()
402 else if ( eng->phy.loopback ) { in recov_phy_marvell0()
405 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_marvell0()
413 //------------------------------------------------------------
419 eng->phy.PHY_15h = phy_read( eng, 21 ); in phy_marvell0()
420 if ( eng->phy.PHY_15h & 0x0030 ) { in phy_marvell0()
421 …printf("\n\n[Warning] Page2, Register 21, bit 4~5 must be 0 [Reg15_2:%04x]\n\n", eng->phy.PHY_15h); in phy_marvell0()
422 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Page2, Register 21, bit 4~5 must be 0 [R… in phy_marvell0()
423 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Page2, Register 21, bit 4~5 must be 0 [… in phy_marvell0()
425 phy_write( eng, 21, eng->phy.PHY_15h & 0xffcf ); // Set [5]Rx Dly, [4]Tx Dly to 0 in phy_marvell0()
430 if ( eng->run.tm_tx_only ) { in phy_marvell0()
433 else if ( eng->phy.loopback ) { in phy_marvell0()
436 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell0()
439 else if ( eng->run.speed_sel[ 1 ] ) { in phy_marvell0()
449 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell0()
460 if ( !eng->phy.loopback ) in phy_marvell0()
461 phy_check_register ( eng, 17, 0x0400, 0x0400, 1, "wait 88E1310 link-up"); in phy_marvell0()
464 // eng->phy.PHY_11h = phy_read( eng, PHY_SR ); in phy_marvell0()
465 // } while ( !( ( eng->phy.PHY_11h & 0x0400 ) | eng->phy.loopback | ( Retry++ > 20 ) ) ); in phy_marvell0()
468 //------------------------------------------------------------
472 phy_addr_org = eng->phy.Adr; in recov_phy_marvell1()
473 for ( eng->phy.Adr = 16; eng->phy.Adr <= 22; eng->phy.Adr++ ) { in recov_phy_marvell1()
474 if ( eng->run.tm_tx_only ) { in recov_phy_marvell1()
477 … phy_write( eng, 6, eng->phy.PHY_06hA[eng->phy.Adr-16] );//06h[5]P5 loopback, 06h[6]P6 loopback in recov_phy_marvell1()
480 for ( eng->phy.Adr = 21; eng->phy.Adr <= 22; eng->phy.Adr++ ) { in recov_phy_marvell1()
483 eng->phy.Adr = phy_addr_org; in recov_phy_marvell1()
486 //------------------------------------------------------------
491 if ( eng->run.tm_tx_only ) { in phy_marvell1()
496 phy_addr_org = eng->phy.Adr; in phy_marvell1()
497 for ( eng->phy.Adr = 16; eng->phy.Adr <= 20; eng->phy.Adr++ ) { in phy_marvell1()
498 eng->phy.PHY_06hA[eng->phy.Adr-16] = phy_read( eng, PHY_ANER ); in phy_marvell1()
502 for ( eng->phy.Adr = 21; eng->phy.Adr <= 22; eng->phy.Adr++ ) { in phy_marvell1()
504 // if ( eng->run.speed_sel[ 0 ] ) phy_write( eng, 1, (PHY_01h & 0xfffc) … in phy_marvell1()
505 // else if ( eng->run.speed_sel[ 1 ] ) phy_write( eng, 1, (PHY_01h & 0xfffc) … in phy_marvell1()
507 …if ( eng->run.speed_sel[ 0 ] ) phy_write( eng, 1, 0x0002 );//01h[1:0]00 = 10 Mbps, 01 = 100 … in phy_marvell1()
508 …else if ( eng->run.speed_sel[ 1 ] ) phy_write( eng, 1, 0x0001 );//01h[1:0]00 = 10 Mbps, 01 = 100 … in phy_marvell1()
511 eng->phy.PHY_06hA[eng->phy.Adr-16] = phy_read( eng, PHY_ANER ); in phy_marvell1()
512 … if ( eng->phy.Adr == 21 ) phy_write( eng, 6, 0x0020 );//06h[5]P5 loopback, 06h[6]P6 loopback in phy_marvell1()
515 eng->phy.Adr = phy_addr_org; in phy_marvell1()
519 //------------------------------------------------------------
521 if ( eng->run.tm_tx_only ) { in recov_phy_marvell2()
523 else if ( eng->phy.loopback ) { in recov_phy_marvell2()
526 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_marvell2()
527 // Enable Stub Test in recov_phy_marvell2()
536 //------------------------------------------------------------
542 eng->phy.PHY_15h = phy_read(eng, 21); in phy_marvell2()
543 eng->phy.PHY_15h &= ~GENMASK(5, 4); in phy_marvell2()
544 if (eng->arg.ctrl.b.phy_tx_delay_en) in phy_marvell2()
545 eng->phy.PHY_15h |= BIT(4); in phy_marvell2()
546 if (eng->arg.ctrl.b.phy_rx_delay_en) in phy_marvell2()
547 eng->phy.PHY_15h |= BIT(5); in phy_marvell2()
549 phy_write(eng, 21, eng->phy.PHY_15h); in phy_marvell2()
554 if ( eng->run.tm_tx_only ) { in phy_marvell2()
557 else if ( eng->phy.loopback ) { in phy_marvell2()
561 eng->phy.PHY_14h = phy_read( eng, 20 ); in phy_marvell2()
563 // if ( eng->phy.PHY_14h & 0x0020 ) { in phy_marvell2()
564 if ( ( eng->phy.PHY_14h & 0x003f ) != 0x0010 ) { in phy_marvell2()
565 …\n\n[Warning] Internal loopback funciton only support in copper mode[%04x]\n\n", eng->phy.PHY_14h); in phy_marvell2()
566 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Internal loopback funciton only support … in phy_marvell2()
567 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Internal loopback funciton only support… in phy_marvell2()
569 phy_write( eng, 20, ( eng->phy.PHY_14h & 0xffc0 ) | 0x8010 ); in phy_marvell2()
579 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell2()
582 else if ( eng->run.speed_sel[ 1 ] ) { in phy_marvell2()
595 if ( !eng->run.speed_sel[ 0 ] ) { in phy_marvell2()
596 … phy_check_register ( eng, 17, 0x0040, 0x0040, 10, "wait 88E15 10/12/14/18 link-up"); in phy_marvell2()
597 … phy_check_register ( eng, 17, 0x0040, 0x0000, 10, "wait 88E15 10/12/14/18 link-up"); in phy_marvell2()
598 … phy_check_register ( eng, 17, 0x0040, 0x0040, 10, "wait 88E15 10/12/14/18 link-up"); in phy_marvell2()
602 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell2()
603 // Enable Stub Test in phy_marvell2()
611 phy_check_register ( eng, 17, 0x0400, 0x0400, 10, "wait 88E15 10/12/14/18 link-up"); in phy_marvell2()
614 // if ( !eng->phy.loopback ) in phy_marvell2()
615 //// if ( !eng->run.tm_tx_only ) in phy_marvell2()
616 // phy_check_register ( eng, 17, 0x0400, 0x0400, 10, "wait 88E15 10/12/14/18 link-up"); in phy_marvell2()
619 //// eng->phy.PHY_11h = phy_read( eng, PHY_SR ); in phy_marvell2()
620 //// } while ( !( ( eng->phy.PHY_11h & 0x0400 ) | eng->phy.loopback | ( Retry++ > 20 ) ) ); in phy_marvell2()
623 //------------------------------------------------------------
632 eng->phy.PHY_1ch = phy_read( eng, 28 ); in phy_marvell3()
633 if (eng->run.is_rgmii) { in phy_marvell3()
634 if ( ( eng->phy.PHY_1ch & 0x0c00 ) != 0x0000 ) { in phy_marvell3()
635 …\n[Warning] Register 28, bit 10~11 must be 0 (RGMIIRX Edge-align Mode)[Reg1ch:%04x]\n\n", eng->phy… in phy_marvell3()
636 eng->phy.PHY_1ch = ( eng->phy.PHY_1ch & 0xf3ff ) | 0x0000; in phy_marvell3()
637 phy_write( eng, 28, eng->phy.PHY_1ch ); in phy_marvell3()
640 if ( ( eng->phy.PHY_1ch & 0x0c00 ) != 0x0800 ) { in phy_marvell3()
641 …f("\n\n[Warning] Register 28, bit 10~11 must be 2 (RMII Mode)[Reg1ch:%04x]\n\n", eng->phy.PHY_1ch); in phy_marvell3()
642 eng->phy.PHY_1ch = ( eng->phy.PHY_1ch & 0xf3ff ) | 0x0800; in phy_marvell3()
643 phy_write( eng, 28, eng->phy.PHY_1ch ); in phy_marvell3()
647 if ( eng->run.tm_tx_only ) { in phy_marvell3()
650 else if ( eng->phy.loopback ) { in phy_marvell3()
657 phy_check_register ( eng, 17, 0x0400, 0x0400, 1, "wait 88E3019 link-up"); in phy_marvell3()
660 //------------------------------------------------------------
667 if ( eng->run.TM_IEEE ) { in phy_broadcom()
668 if ( eng->run.ieee_sel == 0 ) { in phy_broadcom()
673 // phy_write( eng, 0, eng->phy.PHY_00h ); in phy_broadcom()
680 if ( eng->run.speed_sel[ 1 ] ) { in phy_broadcom()
693 //------------------------------------------------------------
695 phy_write( eng, 0, eng->phy.PHY_00h ); in recov_phy_broadcom0()
696 phy_write( eng, 9, eng->phy.PHY_09h ); in recov_phy_broadcom0()
697 // phy_write( eng, 24, eng->phy.PHY_18h | 0xf007 );//write reg 18h, shadow value 111 in recov_phy_broadcom0()
698 // phy_write( eng, 28, eng->phy.PHY_1ch | 0x8c00 );//write reg 1Ch, shadow value 00011 in recov_phy_broadcom0()
700 if ( eng->run.tm_tx_only ) { in recov_phy_broadcom0()
702 else if ( eng->phy.loopback ) { in recov_phy_broadcom0()
703 phy_write( eng, 0, eng->phy.PHY_00h ); in recov_phy_broadcom0()
709 //------------------------------------------------------------
719 eng->phy.PHY_00h = phy_read( eng, PHY_REG_BMCR ); in phy_broadcom0()
720 eng->phy.PHY_09h = phy_read( eng, PHY_GBCR ); in phy_broadcom0()
722 phy_write( eng, 0, eng->phy.PHY_00h & ~BIT(10)); in phy_broadcom0()
729 eng->phy.PHY_18h = phy_read(eng, 0x18); in phy_broadcom0()
730 PHY_new = eng->phy.PHY_18h & ~((0x7 << 12) | 0x7 | BIT(8)); in phy_broadcom0()
732 if (eng->arg.ctrl.b.phy_rx_delay_en) in phy_broadcom0()
739 * bit[9] GTXCLK clock delay enable in phy_broadcom0()
742 eng->phy.PHY_1ch = phy_read(eng, 0x1c); in phy_broadcom0()
743 PHY_new = eng->phy.PHY_1ch & ~((0x1f << 10) | BIT(9)); in phy_broadcom0()
745 if (eng->arg.ctrl.b.phy_tx_delay_en) in phy_broadcom0()
749 if ( eng->run.tm_tx_only ) { in phy_broadcom0()
751 } else if (eng->phy.loopback) { in phy_broadcom0()
753 /* reg1E[12]: force-link */ in phy_broadcom0()
754 if (strncmp((char *)eng->phy.phy_name, "BCM5421x", strlen("BCM5421x")) == 0) in phy_broadcom0()
757 if (eng->run.speed_sel[0]) { in phy_broadcom0()
761 } else if (eng->run.speed_sel[1]) { in phy_broadcom0()
772 //------------------------------------------------------------
779 //------------------------------------------------------------
785 eng->phy.RMIICK_IOMode |= PHY_Flag_RMIICK_IOMode_RTL8201E; in phy_realtek0()
789 eng->phy.PHY_19h = phy_read( eng, 25 ); in phy_realtek0()
791 if ( ( eng->phy.PHY_19h & 0x0400 ) == 0x0 ) { in phy_realtek0()
792 phy_write( eng, 25, eng->phy.PHY_19h | 0x0400 ); in phy_realtek0()
793 … printf("\n\n[Warning] Register 25, bit 10 must be 1 [Reg19h:%04x]\n\n", eng->phy.PHY_19h); in phy_realtek0()
794 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Register 25, bit 10 must be 1 [Reg19h:%0… in phy_realtek0()
795 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Register 25, bit 10 must be 1 [Reg19h:%… in phy_realtek0()
798 if ( eng->arg.ctrl.b.rmii_phy_in == 0 ) { in phy_realtek0()
799 if ( ( eng->phy.PHY_19h & 0x0800 ) == 0x0800 ) { in phy_realtek0()
800 phy_write( eng, 25, eng->phy.PHY_19h & 0xf7ff ); in phy_realtek0()
801 …ng] Register 25, bit 11 must be 0 (TXC should be output mode)[Reg19h:%04x]\n\n", eng->phy.PHY_19h); in phy_realtek0()
802 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Register 25, bit 11 must be 0 (TXC shoul… in phy_realtek0()
803 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Register 25, bit 11 must be 0 (TXC shou… in phy_realtek0()
806 if ( ( eng->phy.PHY_19h & 0x0800 ) == 0x0000 ) { in phy_realtek0()
807 phy_write( eng, 25, eng->phy.PHY_19h | 0x0800 ); in phy_realtek0()
808 …ing] Register 25, bit 11 must be 1 (TXC should be input mode)[Reg19h:%04x]\n\n", eng->phy.PHY_19h); in phy_realtek0()
809 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Register 25, bit 11 must be 1 (TXC shoul… in phy_realtek0()
810 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Register 25, bit 11 must be 1 (TXC shou… in phy_realtek0()
814 if ( eng->run.TM_IEEE ) { in phy_realtek0()
816 if ( eng->run.ieee_sel == 0 ) { in phy_realtek0()
826 //------------------------------------------------------------
828 if ( eng->run.tm_tx_only ) { in recov_phy_realtek1()
829 if ( eng->run.TM_IEEE ) { in recov_phy_realtek1()
830 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek1()
831 if ( eng->run.ieee_sel == 0 ) {//Test Mode 1 in recov_phy_realtek1()
844 else if ( eng->run.speed_sel[ 1 ] ) { in recov_phy_realtek1()
857 } // End if ( eng->run.TM_IEEE ) in recov_phy_realtek1()
859 else if ( eng->phy.loopback ) { in recov_phy_realtek1()
860 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek1()
867 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek1()
884 // else if ( eng->run.speed_sel[ 1 ] ) {//option in recov_phy_realtek1()
889 // else if ( eng->run.speed_sel[ 2 ] ) {//option in recov_phy_realtek1()
897 } // End if ( eng->run.tm_tx_only ) in recov_phy_realtek1()
900 //------------------------------------------------------------
907 if ( eng->run.tm_tx_only ) { in phy_realtek1()
908 if ( eng->run.TM_IEEE ) { in phy_realtek1()
909 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek1()
910 if ( eng->run.ieee_sel == 0 ) {//Test Mode 1 in phy_realtek1()
923 else if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek1()
924 if ( eng->run.ieee_sel == 0 ) {//From Channel A in phy_realtek1()
937 … if ( eng->run.ieee_sel == 0 ) {//Diff. Voltage/TP-IDL/Jitter: Pseudo-random pattern in phy_realtek1()
942 else if ( eng->run.ieee_sel == 1 ) {//Harmonic: pattern in phy_realtek1()
960 else if ( eng->phy.loopback ) { in phy_realtek1()
963 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek1()
970 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek1()
997 // else if ( eng->run.speed_sel[ 1 ] ) {//option in phy_realtek1()
1004 // else if ( eng->run.speed_sel[ 2 ] ) {//option in phy_realtek1()
1017 //------------------------------------------------------------
1022 if ( eng->run.tm_tx_only ) { in recov_phy_realtek2()
1023 if ( eng->run.TM_IEEE ) { in recov_phy_realtek2()
1024 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek2()
1029 else if ( eng->run.speed_sel[ 1 ] ) { in recov_phy_realtek2()
1057 else if ( eng->phy.loopback ) { in recov_phy_realtek2()
1060 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek2()
1085 // else if ( eng->run.speed_sel[ 1 ] ) {//option in recov_phy_realtek2()
1090 // else if ( eng->run.speed_sel[ 2 ] ) {//option in recov_phy_realtek2()
1110 //------------------------------------------------------------
1126 phy_clrset( eng, 0, 0x0000, 0x8000 | eng->phy.PHY_00h ); // clr set // Rst PHY in phy_realtek2()
1131 if ( eng->run.tm_tx_only ) { in phy_realtek2()
1132 if ( eng->run.TM_IEEE ) { in phy_realtek2()
1142 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek2()
1146 if ( eng->run.ieee_sel == 0 ) { in phy_realtek2()
1153 else if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek2()
1162 if ( eng->run.ieee_sel == 0 ) { in phy_realtek2()
1172 if ( eng->run.ieee_sel == 0 ) {//Diff. Voltage/TP-IDL/Jitter in phy_realtek2()
1175 else if ( eng->run.ieee_sel == 1 ) {//Harmonic: �FF� pattern in phy_realtek2()
1191 else if ( eng->phy.loopback ) { in phy_realtek2()
1196 phy_write( eng, 0, eng->phy.PHY_00h ); in phy_realtek2()
1201 phy_clrset( eng, 0, 0x0000, 0x8000 | eng->phy.PHY_00h );//clr set//Rst PHY in phy_realtek2()
1211 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek2()
1214 else if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek2()
1217 else if ( eng->run.speed_sel[ 2 ] ) { in phy_realtek2()
1221 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek2()
1250 // else if ( eng->run.speed_sel[ 1 ] ) {//option in phy_realtek2()
1258 // else if ( eng->run.speed_sel[ 2 ] ) {//option in phy_realtek2()
1267 if ( eng->run.speed_sel[ 1 ] ) in phy_realtek2()
1272 phy_write( eng, 0, eng->phy.PHY_00h ); in phy_realtek2()
1290 //------------------------------------------------------------
1292 if ( eng->run.tm_tx_only ) { in recov_phy_realtek3()
1293 if ( eng->run.TM_IEEE ) { in recov_phy_realtek3()
1294 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek3()
1297 else if ( eng->run.speed_sel[ 1 ] ) { in recov_phy_realtek3()
1298 phy_write( eng, 17, eng->phy.PHY_11h ); in recov_phy_realtek3()
1311 else if ( eng->phy.loopback ) { in recov_phy_realtek3()
1312 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek3()
1318 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek3()
1339 //------------------------------------------------------------
1343 if ( eng->run.tm_tx_only ) { in phy_realtek3()
1344 if ( eng->run.TM_IEEE ) { in phy_realtek3()
1345 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek3()
1346 if ( eng->run.ieee_sel == 0 ) { //Test Mode 1 in phy_realtek3()
1349 else if ( eng->run.ieee_sel == 1 ) {//Test Mode 2 in phy_realtek3()
1352 else if ( eng->run.ieee_sel == 2 ) {//Test Mode 3 in phy_realtek3()
1359 else if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek3()
1360 eng->phy.PHY_11h = phy_read( eng, PHY_SR ); in phy_realtek3()
1361 phy_write( eng, 17, eng->phy.PHY_11h & 0xfff7 ); in phy_realtek3()
1364 if ( eng->run.ieee_sel == 0 ) { in phy_realtek3()
1372 // if ( eng->run.ieee_sel == 0 ) {//Pseudo-random pattern in phy_realtek3()
1377 // else if ( eng->run.ieee_sel == 1 ) {//�FF� pattern in phy_realtek3()
1395 else if ( eng->phy.loopback ) { in phy_realtek3()
1403 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek3()
1411 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek3()
1436 //------------------------------------------------------------
1443 eng->phy.RMIICK_IOMode |= PHY_Flag_RMIICK_IOMode_RTL8201F; in phy_realtek4()
1446 eng->phy.PHY_10h = phy_read( eng, 16 ); in phy_realtek4()
1448 if ( ( eng->phy.PHY_10h & 0x0008 ) == 0x0 ) { in phy_realtek4()
1449 phy_write( eng, 16, eng->phy.PHY_10h | 0x0008 ); in phy_realtek4()
1450 … printf("\n\n[Warning] Page 7 Register 16, bit 3 must be 1 [Reg10h_7:%04x]\n\n", eng->phy.PHY_10h); in phy_realtek4()
1451 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Page 7 Register 16, bit 3 must be 1 [Reg… in phy_realtek4()
1452 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Page 7 Register 16, bit 3 must be 1 [Re… in phy_realtek4()
1455 if ( eng->arg.ctrl.b.rmii_phy_in == 0 ) { in phy_realtek4()
1456 if ( ( eng->phy.PHY_10h & 0x1000 ) == 0x1000 ) { in phy_realtek4()
1457 phy_write( eng, 16, eng->phy.PHY_10h & 0xefff ); in phy_realtek4()
1458 …7 Register 16, bit 12 must be 0 (TXC should be output mode)[Reg10h_7:%04x]\n\n", eng->phy.PHY_10h); in phy_realtek4()
1459 … ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Page 7 Register 16, bit 12 must be 0 (TXC … in phy_realtek4()
1460 …( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Page 7 Register 16, bit 12 must be 0 (TXC … in phy_realtek4()
1463 if ( ( eng->phy.PHY_10h & 0x1000 ) == 0x0000 ) { in phy_realtek4()
1464 phy_write( eng, 16, eng->phy.PHY_10h | 0x1000 ); in phy_realtek4()
1465 … 7 Register 16, bit 12 must be 1 (TXC should be input mode)[Reg10h_7:%04x]\n\n", eng->phy.PHY_10h); in phy_realtek4()
1466 …f ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Page 7 Register 16, bit 12 must be 1 (TXC… in phy_realtek4()
1467 … ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Page 7 Register 16, bit 12 must be 1 (TXC… in phy_realtek4()
1472 if ( eng->run.tm_tx_only ) { in phy_realtek4()
1473 if ( eng->run.TM_IEEE ) { in phy_realtek4()
1480 if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek4()
1483 phy_write( eng, 24, 0x0310 ); // Disable ALDPS in phy_realtek4()
1485 if ( eng->run.ieee_sel == 0 ) {//From Channel A (RJ45 pair 1, 2) in phy_realtek4()
1499 else if ( eng->phy.loopback ) { in phy_realtek4()
1501 if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek4()
1502 // Enable 100M PCS loop back; RTL8201(F_FL_FN)-VB-CG_DataSheet_1.6.pdf in phy_realtek4()
1510 } else if ( eng->run.speed_sel[ 2 ] ) { in phy_realtek4()
1511 // Enable 10M PCS loop back; RTL8201(F_FL_FN)-VB-CG_DataSheet_1.6.pdf in phy_realtek4()
1523 if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek4()
1524 … // Enable 100M MDI loop back Nway option; RTL8201(F_FL_FN)-VB-CG_DataSheet_1.6.pdf in phy_realtek4()
1528 } else if ( eng->run.speed_sel[ 2 ] ) { in phy_realtek4()
1529 … // Enable 10M MDI loop back Nway option; RTL8201(F_FL_FN)-VB-CG_DataSheet_1.6.pdf in phy_realtek4()
1537 // phy_write( eng, 0, eng->phy.PHY_00h ); in phy_realtek4()
1547 //------------------------------------------------------------
1552 if ( eng->run.tm_tx_only ) { in recov_phy_realtek5()
1553 if ( eng->run.TM_IEEE ) { in recov_phy_realtek5()
1554 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek5()
1559 else if ( eng->run.speed_sel[ 1 ] ) { in recov_phy_realtek5()
1581 else if ( eng->phy.loopback ) { in recov_phy_realtek5()
1584 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek5()
1590 // else if ( eng->run.speed_sel[ 1 ] ) {//option in recov_phy_realtek5()
1595 // else if ( eng->run.speed_sel[ 2 ] ) {//option in recov_phy_realtek5()
1618 //------------------------------------------------------------
1628 /* page 0xd08, reg 0x11[8] TX delay enable */ in phy_realtek5()
1630 if (eng->arg.ctrl.b.phy_tx_delay_en) in phy_realtek5()
1636 /* page 0xd08, reg 0x15[3] RX delay enable */ in phy_realtek5()
1638 if (eng->arg.ctrl.b.phy_rx_delay_en) in phy_realtek5()
1647 if (eng->run.tm_tx_only) { in phy_realtek5()
1648 if (eng->run.TM_IEEE) { in phy_realtek5()
1649 if (eng->run.speed_sel[0]) { in phy_realtek5()
1652 if (eng->run.ieee_sel == 0) { // Test Mode 1 in phy_realtek5()
1654 } else if (eng->run.ieee_sel == in phy_realtek5()
1660 } else if (eng->run.speed_sel[1]) { // option in phy_realtek5()
1663 if (eng->run.ieee_sel == in phy_realtek5()
1664 0) { // Output MLT-3 from Channel A in phy_realtek5()
1666 } else { // Output MLT-3 from Channel B in phy_realtek5()
1673 // 0: For Diff. Voltage/TP-IDL/Jitter with EEE in phy_realtek5()
1674 // 1: For Diff. Voltage/TP-IDL/Jitter without in phy_realtek5()
1682 if ((eng->run.ieee_sel & 0x1) == 0) { // with in phy_realtek5()
1691 if ((eng->run.ieee_sel & 0x6) == in phy_realtek5()
1692 0) { // For Diff. Voltage/TP-IDL/Jitter in phy_realtek5()
1696 } else if ((eng->run.ieee_sel & 0x6) == in phy_realtek5()
1712 } else if (eng->phy.loopback) { in phy_realtek5()
1715 if (eng->run.speed_sel[0]) { in phy_realtek5()
1735 if (eng->run.speed_sel[1]) in phy_realtek5()
1748 phy_write(eng, 0, eng->phy.PHY_00h); in phy_realtek5()
1771 //------------------------------------------------------------
1776 if (eng->run.tm_tx_only) { in phy_realtek6()
1778 } else if (eng->phy.loopback) { in phy_realtek6()
1784 0x8000 | eng->phy.PHY_00h); // clr set//Rst PHY in phy_realtek6()
1795 //------------------------------------------------------------
1801 //------------------------------------------------------------
1810 //------------------------------------------------------------
1817 eng->phy.PHY_1fh = phy_read( eng, 31 ); in phy_micrel0()
1818 …if ( eng->phy.PHY_1fh & 0x0080 ) sprintf((char *)eng->phy.phy_name, "%s-50MHz Mode", eng->phy.phy_… in phy_micrel0()
1819 …else sprintf((char *)eng->phy.phy_name, "%s-25MHz Mode", eng->phy.phy_… in phy_micrel0()
1821 if ( eng->run.TM_IEEE ) { in phy_micrel0()
1822 phy_clrset( eng, 0, 0x0000, 0x8000 | eng->phy.PHY_00h );//clr set//Rst PHY in phy_micrel0()
1825 phy_clrset( eng, 31, 0x0000, 0x2000 );//clr set//1Fh[13] = 1: Disable auto MDI/MDI-X in phy_micrel0()
1834 //Reg16h[6] = 1 : RMII B-to-B override in phy_micrel0()
1839 if ( eng->phy.PHY_1fh & 0x0080 ) in phy_micrel0()
1843 //------------------------------------------------------------
1862 printf("Reg2.4 = %04x -> %04x\n", temp, phy_read( eng, 14 )); in phy_micrel1()
1874 printf("Reg2.5 = %04x -> %04x\n", temp, phy_read( eng, 14 )); in phy_micrel1()
1884 printf("Reg2.8 = %04x -> %04x\n", temp, phy_read( eng, 14 )); in phy_micrel1()
1887 if ( eng->run.tm_tx_only ) { in phy_micrel1()
1888 if ( eng->run.TM_IEEE ) { in phy_micrel1()
1895 else if ( eng->phy.loopback ) { in phy_micrel1()
1899 if ( eng->run.speed_sel[ 0 ] ) { in phy_micrel1()
1908 //------------------------------------------------------------
1916 if ( eng->run.tm_tx_only ) { in phy_micrel2()
1917 if ( eng->run.TM_IEEE ) { in phy_micrel2()
1924 else if ( eng->phy.loopback ) { in phy_micrel2()
1928 if ( eng->run.speed_sel[ 1 ] ) in phy_micrel2()
1935 //------------------------------------------------------------
1937 if ( eng->run.tm_tx_only ) { in recov_phy_vitesse()
1938 // if ( eng->run.TM_IEEE ) { in recov_phy_vitesse()
1943 else if ( eng->phy.loopback ) { in recov_phy_vitesse()
1946 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_vitesse()
1947 phy_write( eng, 24, eng->phy.PHY_18h ); in recov_phy_vitesse()
1948 phy_write( eng, 18, eng->phy.PHY_12h ); in recov_phy_vitesse()
1953 //------------------------------------------------------------
1957 if ( eng->run.tm_tx_only ) { in phy_vitesse()
1958 if ( eng->run.TM_IEEE ) { in phy_vitesse()
1965 else if ( eng->phy.loopback ) { in phy_vitesse()
1969 if ( eng->run.speed_sel[ 0 ] ) { in phy_vitesse()
1970 eng->phy.PHY_18h = phy_read( eng, 24 ); in phy_vitesse()
1971 eng->phy.PHY_12h = phy_read( eng, PHY_INER ); in phy_vitesse()
1975 phy_write( eng, 24, eng->phy.PHY_18h | 0x0001 ); in phy_vitesse()
1976 phy_write( eng, 18, eng->phy.PHY_12h | 0x0020 ); in phy_vitesse()
1984 //------------------------------------------------------------
1986 if (eng->run.tm_tx_only) { in recov_phy_atheros()
1987 if (eng->run.TM_IEEE) { in recov_phy_atheros()
1990 } else if (eng->phy.loopback) { in recov_phy_atheros()
1997 0x0000); // clr set//Enable external loopback: Reg11h[0] = 1 in recov_phy_atheros()
2001 //------------------------------------------------------------
2006 eng->phy.PHY_1eh = phy_read(eng, 30); in phy_atheros()
2007 if (eng->phy.PHY_1eh & 0x8000) { in phy_atheros()
2010 eng->phy.PHY_1eh); in phy_atheros()
2011 if (eng->run.TM_IOTiming) in phy_atheros()
2015 eng->phy.PHY_1eh); in phy_atheros()
2016 if (!eng->run.tm_tx_only) in phy_atheros()
2020 eng->phy.PHY_1eh); in phy_atheros()
2022 phy_write(eng, 30, eng->phy.PHY_1eh & 0x7fff); in phy_atheros()
2024 // phy_write( eng, 30, (eng->phy.PHY_1eh & 0x7fff) | 0x8000 ); in phy_atheros()
2028 eng->phy.PHY_1eh = phy_read(eng, 30); in phy_atheros()
2029 if (eng->phy.PHY_1eh & 0x8000) { in phy_atheros()
2032 eng->phy.PHY_1eh); in phy_atheros()
2033 if (eng->run.TM_IOTiming) in phy_atheros()
2037 eng->phy.PHY_1eh); in phy_atheros()
2038 if (!eng->run.tm_tx_only) in phy_atheros()
2042 eng->phy.PHY_1eh); in phy_atheros()
2044 phy_write(eng, 30, eng->phy.PHY_1eh & 0x7fff); in phy_atheros()
2046 // phy_write( eng, 30, (eng->phy.PHY_1eh & 0x7fff) | 0x8000 ); in phy_atheros()
2050 eng->phy.PHY_1eh = phy_read(eng, 30); in phy_atheros()
2051 if (eng->phy.PHY_1eh & 0x0100) { in phy_atheros()
2054 eng->phy.PHY_1eh); in phy_atheros()
2055 if (eng->run.TM_IOTiming) in phy_atheros()
2059 eng->phy.PHY_1eh); in phy_atheros()
2060 if (!eng->run.tm_tx_only) in phy_atheros()
2064 eng->phy.PHY_1eh); in phy_atheros()
2066 phy_write(eng, 30, eng->phy.PHY_1eh & 0xfeff); in phy_atheros()
2068 // phy_write( eng, 30, (eng->phy.PHY_1eh & 0xfeff) | 0x0100 ); in phy_atheros()
2074 eng->phy.PHY_0eh = phy_read(eng, 14); in phy_atheros()
2075 if ((eng->phy.PHY_0eh & 0x0018) != 0x0018) { in phy_atheros()
2078 eng->phy.PHY_0eh); in phy_atheros()
2079 if (eng->run.TM_IOTiming) in phy_atheros()
2083 eng->phy.PHY_0eh); in phy_atheros()
2084 if (!eng->run.tm_tx_only) in phy_atheros()
2088 eng->phy.PHY_0eh); in phy_atheros()
2092 phy_write(eng, 14, (eng->phy.PHY_0eh & 0xffe7) | 0x0018); in phy_atheros()
2095 if (eng->run.tm_tx_only) { in phy_atheros()
2096 if (eng->run.TM_IEEE) { in phy_atheros()
2097 phy_write(eng, 0, eng->phy.PHY_00h); in phy_atheros()
2099 phy_write(eng, 0, eng->phy.PHY_00h); in phy_atheros()
2101 } else if (eng->phy.loopback) { in phy_atheros()
2102 phy_write(eng, 0, eng->phy.PHY_00h); in phy_atheros()
2109 0x0001); // clr set//Enable external loopback: Reg11h[0] = 1 in phy_atheros()
2111 phy_write(eng, 0, eng->phy.PHY_00h | 0x8000); in phy_atheros()
2118 //------------------------------------------------------------
2126 //------------------------------------------------------------
2128 //------------------------------------------------------------
2130 * @return 1->addr found, 0->else
2140 phy_addr_org = eng->phy.Adr; in phy_find_addr()
2144 if ((ret == 0) && (eng->arg.ctrl.b.skip_phy_id_check)) { in phy_find_addr()
2146 if ((value & BIT(15)) && (0 == eng->arg.ctrl.b.skip_phy_init)) { in phy_find_addr()
2156 for (eng->phy.Adr = 0; eng->phy.Adr < 32; eng->phy.Adr++) { in phy_find_addr()
2166 eng->phy.Adr = eng->arg.phy_addr; in phy_find_addr()
2168 if (0 == eng->arg.ctrl.b.skip_phy_init) { in phy_find_addr()
2170 if (phy_addr_org != eng->phy.Adr) { in phy_find_addr()
2180 eng->phy.id1 = phy_read(eng, PHY_REG_ID_1); in phy_find_addr()
2181 eng->phy.id2 = phy_read(eng, PHY_REG_ID_2); in phy_find_addr()
2182 value = (eng->phy.id2 << 16) | eng->phy.id1; in phy_find_addr()
2184 if (0 == eng->arg.ctrl.b.skip_phy_id_check) { in phy_find_addr()
2186 sprintf((char *)eng->phy.phy_name, "--"); in phy_find_addr()
2187 if (0 == eng->arg.ctrl.b.skip_phy_init) in phy_find_addr()
2195 //------------------------------------------------------------
2200 eng->phy.PHY_00h = BIT(8); in phy_set00h()
2202 if (eng->run.speed_sel[0]) in phy_set00h()
2203 eng->phy.PHY_00h |= BIT(6); in phy_set00h()
2204 else if (eng->run.speed_sel[1]) in phy_set00h()
2205 eng->phy.PHY_00h |= BIT(13); in phy_set00h()
2207 if (eng->phy.loopback) in phy_set00h()
2208 eng->phy.PHY_00h |= BIT(14); in phy_set00h()
2215 value = (p_eng->phy.id1 << 16) | (p_eng->phy.id2 & p_phy->id2_mask); in phy_check_id()
2216 id = (p_phy->id1 << 16) | (p_phy->id2 & p_phy->id2_mask); in phy_check_id()
2232 sprintf((char *)eng->phy.phy_name, "default"); in phy_select()
2233 phyeng->fp_set = phy_default; in phy_select()
2234 phyeng->fp_clr = NULL; in phy_select()
2236 if (eng->phy.default_phy) { in phy_select()
2242 sprintf((char *)eng->phy.phy_name, in phy_select()
2243 (char *)p_phy->name); in phy_select()
2244 phyeng->fp_set = p_phy->cfg.fp_set; in phy_select()
2245 phyeng->fp_clr = p_phy->cfg.fp_clr; in phy_select()
2251 if (eng->arg.ctrl.b.skip_phy_init) { in phy_select()
2252 phyeng->fp_set = NULL; in phy_select()
2253 phyeng->fp_clr = NULL; in phy_select()
2254 } else if (eng->arg.ctrl.b.skip_phy_deinit) { in phy_select()
2255 phyeng->fp_clr = NULL; in phy_select()
2259 //------------------------------------------------------------
2264 if (phyeng->fp_clr != NULL) in recov_phy()
2265 (*phyeng->fp_clr)( eng ); in recov_phy()
2268 //------------------------------------------------------------
2277 if (phyeng->fp_set != NULL) in init_phy()
2278 (*phyeng->fp_set)(eng); in init_phy()