Lines Matching +full:1 +full:- +full:eng
1 // SPDX-License-Identifier: GPL-2.0+
12 #define DbgPrn_PHYRW 1
17 #define DbgPrn_PHYRW 1
63 //------------------------------------------------------------
65 //------------------------------------------------------------
66 void phy_write (MAC_ENGINE *eng, int index, uint32_t data) in phy_write() argument
71 if (eng->env.is_new_mdio_reg[eng->run.mdio_idx]) { in phy_write()
73 MDIO_SET_PHY_ADDR(eng->phy.Adr) | in phy_write()
75 writel(wr_data, eng->run.mdio_base); in phy_write()
76 /* check time-out */ in phy_write()
77 while (readl(eng->run.mdio_base) & MDIO_FIRE_BUSY) { in phy_write()
79 if (!eng->run.tm_tx_only) in phy_write()
81 "[PHY-Write] Time out: %08x\n", in phy_write()
82 readl(eng->run.mdio_base)); in phy_write()
84 FindErr(eng, Err_Flag_PHY_TimeOut_RW); in phy_write()
89 writel(data, eng->run.mdio_base + 0x4); in phy_write()
91 MDIO_SET_PHY_ADDR_OLD(eng->phy.Adr) | in phy_write()
93 eng->run.mdio_base); in phy_write()
95 while (readl(eng->run.mdio_base) & MDIO_WR_CODE_OLD) { in phy_write()
97 if (!eng->run.tm_tx_only) in phy_write()
99 "[PHY-Write] Time out: %08x\n", in phy_write()
100 readl(eng->run.mdio_base)); in phy_write()
102 FindErr(eng, Err_Flag_PHY_TimeOut_RW); in phy_write()
106 } // End if (eng->env.new_mdio_reg) in phy_write()
110 eng->phy.Adr, eng->run.mdio_base); in phy_write()
111 if (!eng->run.tm_tx_only) in phy_write()
113 data, eng->phy.Adr, eng->run.mdio_base); in phy_write()
118 //------------------------------------------------------------
119 uint16_t phy_read (MAC_ENGINE *eng, int index) in phy_read() argument
126 FindErr(eng, Err_Flag_PHY_TimeOut_RW); in phy_read()
130 if (eng->env.is_new_mdio_reg[eng->run.mdio_idx]) { in phy_read()
131 writel(MDIO_RD_CODE | MDIO_SET_PHY_ADDR(eng->phy.Adr) | in phy_read()
133 eng->run.mdio_base); in phy_read()
135 while (readl(eng->run.mdio_base) & MDIO_FIRE_BUSY) { in phy_read()
137 if (!eng->run.tm_tx_only) in phy_read()
139 "[PHY-Read] Time out: %08x\n", in phy_read()
140 readl(eng->run.mdio_base)); in phy_read()
142 FindErr(eng, Err_Flag_PHY_TimeOut_RW); in phy_read()
150 read_value = readl(eng->run.mdio_base + 0x4) & GENMASK(15, 0); in phy_read()
153 MDIO_SET_PHY_ADDR_OLD(eng->phy.Adr) | in phy_read()
155 eng->run.mdio_base); in phy_read()
157 while (readl(eng->run.mdio_base) & MDIO_RD_CODE_OLD) { in phy_read()
159 if (!eng->run.tm_tx_only) in phy_read()
161 "[PHY-Read] Time out: %08x\n", in phy_read()
162 readl(eng->run.mdio_base)); in phy_read()
164 FindErr(eng, Err_Flag_PHY_TimeOut_RW); in phy_read()
172 read_value = readl(eng->run.mdio_base + 0x4) >> 16; in phy_read()
178 eng->phy.Adr, eng->run.mdio_base); in phy_read()
179 if (!eng->run.tm_tx_only) in phy_read()
181 read_value, eng->phy.Adr, eng->run.mdio_base); in phy_read()
185 } // End uint16_t phy_read (MAC_ENGINE *eng, int adr) in phy_read()
187 //------------------------------------------------------------
188 void phy_clrset(MAC_ENGINE *eng, int adr, uint32_t clr_mask, uint32_t set_mask) in phy_clrset() argument
192 clr_mask, set_mask, eng->phy.Adr, eng->run.mdio_base); in phy_clrset()
193 if (!eng->run.tm_tx_only) in phy_clrset()
196 adr, clr_mask, set_mask, eng->phy.Adr, in phy_clrset()
197 eng->run.mdio_base); in phy_clrset()
199 phy_write(eng, adr, ((phy_read(eng, adr) & (~clr_mask)) | set_mask)); in phy_clrset()
202 //------------------------------------------------------------
203 void phy_dump(MAC_ENGINE *eng) in phy_dump() argument
207 printf("[PHY%d][%d]----------------\n", eng->run.mac_idx + 1, in phy_dump()
208 eng->phy.Adr); in phy_dump()
210 printf("%02d: %04x ", index, phy_read(eng, index)); in phy_dump()
217 //------------------------------------------------------------
218 static void phy_scan_id(MAC_ENGINE *eng, uint8_t option) in phy_scan_id() argument
222 phy_addr_orig = eng->phy.Adr; in phy_scan_id()
223 for (eng->phy.Adr = 0; eng->phy.Adr < 32; eng->phy.Adr++) { in phy_scan_id()
224 PRINTF(option, "[%02d] ", eng->phy.Adr); in phy_scan_id()
225 PRINTF(option, "%d:%04x ", 2, phy_read(eng, 2)); in phy_scan_id()
226 PRINTF(option, "%d:%04x ", 3, phy_read(eng, 3)); in phy_scan_id()
228 if ((eng->phy.Adr % 4) == 3) in phy_scan_id()
231 eng->phy.Adr = phy_addr_orig; in phy_scan_id()
234 //------------------------------------------------------------
246 //------------------------------------------------------------
248 //------------------------------------------------------------
249 void phy_basic_setting(MAC_ENGINE *eng) in phy_basic_setting() argument
253 phy_clrset(eng, 0, clr, eng->phy.PHY_00h); in phy_basic_setting()
256 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_basic_setting()
257 eng->run.mdio_base); in phy_basic_setting()
258 if (!eng->run.tm_tx_only) in phy_basic_setting()
260 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_basic_setting()
261 eng->run.mdio_base); in phy_basic_setting()
265 //------------------------------------------------------------
266 void phy_wait_reset_done(MAC_ENGINE *eng) in phy_wait_reset_done() argument
270 while (phy_read(eng, PHY_REG_BMCR) & 0x8000) { in phy_wait_reset_done()
272 if (!eng->run.tm_tx_only) in phy_wait_reset_done()
273 PRINTF(FP_LOG, "[PHY-Reset] Time out: %08x\n", in phy_wait_reset_done()
274 readl(eng->run.mdio_base)); in phy_wait_reset_done()
276 FindErr(eng, Err_Flag_PHY_TimeOut_Rst); in phy_wait_reset_done()
283 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_wait_reset_done()
284 eng->run.mdio_base); in phy_wait_reset_done()
285 if (!eng->run.tm_tx_only) in phy_wait_reset_done()
287 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_wait_reset_done()
288 eng->run.mdio_base); in phy_wait_reset_done()
295 //------------------------------------------------------------
296 static void phy_reset(MAC_ENGINE *eng) in phy_reset() argument
298 phy_basic_setting(eng); in phy_reset()
300 //phy_clrset(eng, 0, 0x0000, 0x8000 | eng->phy.PHY_00h); in phy_reset()
301 phy_clrset(eng, 0, 0x7140, 0x8000 | eng->phy.PHY_00h); in phy_reset()
302 //phy_write(eng, 0, 0x8000); //clr set//Rst PHY in phy_reset()
303 phy_wait_reset_done(eng); in phy_reset()
305 phy_basic_setting(eng); in phy_reset()
311 //------------------------------------------------------------
312 void phy_check_register (MAC_ENGINE *eng, uint32_t adr, uint32_t check_mask, uint32_t check_value, … in phy_check_register() argument
317 if ( (phy_read( eng, adr ) & check_mask) == check_value ) { in phy_check_register()
322 phy_delay(1); in phy_check_register()
335 //------------------------------------------------------------
337 //------------------------------------------------------------
338 void recov_phy_marvell (MAC_ENGINE *eng) {//88E1111 in recov_phy_marvell() argument
339 if ( eng->run.tm_tx_only ) { in recov_phy_marvell()
341 else if ( eng->phy.loopback ) { in recov_phy_marvell()
344 if (eng->run.speed_sel[0]) { in recov_phy_marvell()
345 phy_write(eng, 9, eng->phy.PHY_09h); in recov_phy_marvell()
347 phy_reset(eng); in recov_phy_marvell()
349 phy_write(eng, 29, 0x0007); in recov_phy_marvell()
350 phy_clrset(eng, 30, 0x0008, 0x0000); //clr set in recov_phy_marvell()
351 phy_write(eng, 29, 0x0010); in recov_phy_marvell()
352 phy_clrset(eng, 30, 0x0002, 0x0000); //clr set in recov_phy_marvell()
353 phy_write(eng, 29, 0x0012); in recov_phy_marvell()
354 phy_clrset(eng, 30, 0x0001, 0x0000); //clr set in recov_phy_marvell()
356 phy_write(eng, 18, eng->phy.PHY_12h); in recov_phy_marvell()
361 //------------------------------------------------------------
362 void phy_marvell (MAC_ENGINE *eng) in phy_marvell() argument
364 if ( eng->run.tm_tx_only ) { in phy_marvell()
365 phy_reset( eng ); in phy_marvell()
367 else if ( eng->phy.loopback ) { in phy_marvell()
368 phy_reset( eng ); in phy_marvell()
371 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell()
372 eng->phy.PHY_09h = phy_read( eng, PHY_GBCR ); in phy_marvell()
373 eng->phy.PHY_12h = phy_read( eng, PHY_INER ); in phy_marvell()
374 phy_write( eng, 18, 0x0000 ); in phy_marvell()
375 phy_clrset( eng, 9, 0x0000, 0x1800 );//clr set in phy_marvell()
378 phy_reset( eng ); in phy_marvell()
380 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell()
381 phy_write( eng, 29, 0x0007 ); in phy_marvell()
382 phy_clrset( eng, 30, 0x0000, 0x0008 );//clr set in phy_marvell()
383 phy_write( eng, 29, 0x0010 ); in phy_marvell()
384 phy_clrset( eng, 30, 0x0000, 0x0002 );//clr set in phy_marvell()
385 phy_write( eng, 29, 0x0012 ); in phy_marvell()
386 phy_clrset( eng, 30, 0x0000, 0x0001 );//clr set in phy_marvell()
390 if ( !eng->phy.loopback ) in phy_marvell()
391 phy_check_register ( eng, 17, 0x0400, 0x0400, 1, "wait 88E1111 link-up"); in phy_marvell()
394 // eng->phy.PHY_11h = phy_read( eng, PHY_SR ); in phy_marvell()
395 // } while ( !( ( eng->phy.PHY_11h & 0x0400 ) | eng->phy.loopback | ( Retry++ > 20 ) ) ); in phy_marvell()
398 //------------------------------------------------------------
399 void recov_phy_marvell0 (MAC_ENGINE *eng) {//88E1310 in recov_phy_marvell0() argument
400 if ( eng->run.tm_tx_only ) { in recov_phy_marvell0()
402 else if ( eng->phy.loopback ) { in recov_phy_marvell0()
405 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_marvell0()
406 phy_write( eng, 22, 0x0006 ); in recov_phy_marvell0()
407 phy_clrset( eng, 16, 0x0020, 0x0000 );//clr set in recov_phy_marvell0()
408 phy_write( eng, 22, 0x0000 ); in recov_phy_marvell0()
413 //------------------------------------------------------------
414 void phy_marvell0 (MAC_ENGINE *eng) {//88E1310 in phy_marvell0() argument
417 phy_write( eng, 22, 0x0002 ); in phy_marvell0()
419 eng->phy.PHY_15h = phy_read( eng, 21 ); in phy_marvell0()
420 if ( eng->phy.PHY_15h & 0x0030 ) { in phy_marvell0()
421 …printf("\n\n[Warning] Page2, Register 21, bit 4~5 must be 0 [Reg15_2:%04x]\n\n", eng->phy.PHY_15h); in phy_marvell0()
422 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Page2, Register 21, bit 4~5 must be 0 [R… in phy_marvell0()
423 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Page2, Register 21, bit 4~5 must be 0 [… in phy_marvell0()
425 phy_write( eng, 21, eng->phy.PHY_15h & 0xffcf ); // Set [5]Rx Dly, [4]Tx Dly to 0 in phy_marvell0()
427 phy_read( eng, 21 ); // v069 in phy_marvell0()
428 phy_write( eng, 22, 0x0000 ); in phy_marvell0()
430 if ( eng->run.tm_tx_only ) { in phy_marvell0()
431 phy_reset( eng ); in phy_marvell0()
433 else if ( eng->phy.loopback ) { in phy_marvell0()
434 phy_write( eng, 22, 0x0002 ); in phy_marvell0()
436 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell0()
437 phy_clrset( eng, 21, 0x6040, 0x0040 );//clr set in phy_marvell0()
439 else if ( eng->run.speed_sel[ 1 ] ) { in phy_marvell0()
440 phy_clrset( eng, 21, 0x6040, 0x2000 );//clr set in phy_marvell0()
443 phy_clrset( eng, 21, 0x6040, 0x0000 );//clr set in phy_marvell0()
445 phy_write( eng, 22, 0x0000 ); in phy_marvell0()
446 phy_reset( eng ); in phy_marvell0()
449 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell0()
450 phy_write( eng, 22, 0x0006 ); in phy_marvell0()
451 phy_clrset( eng, 16, 0x0000, 0x0020 );//clr set in phy_marvell0()
452 phy_read( eng, 16 ); // v069 in phy_marvell0()
453 phy_write( eng, 22, 0x0000 ); in phy_marvell0()
456 phy_reset( eng ); in phy_marvell0()
457 phy_read( eng, 0 ); // v069 in phy_marvell0()
460 if ( !eng->phy.loopback ) in phy_marvell0()
461 phy_check_register ( eng, 17, 0x0400, 0x0400, 1, "wait 88E1310 link-up"); in phy_marvell0()
464 // eng->phy.PHY_11h = phy_read( eng, PHY_SR ); in phy_marvell0()
465 // } while ( !( ( eng->phy.PHY_11h & 0x0400 ) | eng->phy.loopback | ( Retry++ > 20 ) ) ); in phy_marvell0()
468 //------------------------------------------------------------
469 void recov_phy_marvell1 (MAC_ENGINE *eng) {//88E6176 in recov_phy_marvell1() argument
472 phy_addr_org = eng->phy.Adr; in recov_phy_marvell1()
473 for ( eng->phy.Adr = 16; eng->phy.Adr <= 22; eng->phy.Adr++ ) { in recov_phy_marvell1()
474 if ( eng->run.tm_tx_only ) { in recov_phy_marvell1()
477 … phy_write( eng, 6, eng->phy.PHY_06hA[eng->phy.Adr-16] );//06h[5]P5 loopback, 06h[6]P6 loopback in recov_phy_marvell1()
480 for ( eng->phy.Adr = 21; eng->phy.Adr <= 22; eng->phy.Adr++ ) { in recov_phy_marvell1()
481 …phy_write( eng, 1, 0x0003 ); //01h[1:0]00 = 10 Mbps, 01 = 100 Mbps, 10 = 1000 Mbps, 11 = Speed is… in recov_phy_marvell1()
483 eng->phy.Adr = phy_addr_org; in recov_phy_marvell1()
486 //------------------------------------------------------------
487 void phy_marvell1 (MAC_ENGINE *eng) {//88E6176 in phy_marvell1() argument
491 if ( eng->run.tm_tx_only ) { in phy_marvell1()
496 phy_addr_org = eng->phy.Adr; in phy_marvell1()
497 for ( eng->phy.Adr = 16; eng->phy.Adr <= 20; eng->phy.Adr++ ) { in phy_marvell1()
498 eng->phy.PHY_06hA[eng->phy.Adr-16] = phy_read( eng, PHY_ANER ); in phy_marvell1()
499 phy_write( eng, 6, 0x0000 );//06h[5]P5 loopback, 06h[6]P6 loopback in phy_marvell1()
502 for ( eng->phy.Adr = 21; eng->phy.Adr <= 22; eng->phy.Adr++ ) { in phy_marvell1()
503 // PHY_01h = phy_read( eng, PHY_REG_BMSR ); in phy_marvell1()
504 // if ( eng->run.speed_sel[ 0 ] ) phy_write( eng, 1, (PHY_01h & 0xfffc) … in phy_marvell1()
505 // else if ( eng->run.speed_sel[ 1 ] ) phy_write( eng, 1, (PHY_01h & 0xfffc) … in phy_marvell1()
506 … else phy_write( eng, 1, (PHY_01h & 0xfffc) );//[1… in phy_marvell1()
507 …if ( eng->run.speed_sel[ 0 ] ) phy_write( eng, 1, 0x0002 );//01h[1:0]00 = 10 Mbps, 01 = 100 … in phy_marvell1()
508 …else if ( eng->run.speed_sel[ 1 ] ) phy_write( eng, 1, 0x0001 );//01h[1:0]00 = 10 Mbps, 01 = 100 … in phy_marvell1()
509 …else phy_write( eng, 1, 0x0000 );//01h[1:0]00 = 10 Mbps, 01 = 100 … in phy_marvell1()
511 eng->phy.PHY_06hA[eng->phy.Adr-16] = phy_read( eng, PHY_ANER ); in phy_marvell1()
512 … if ( eng->phy.Adr == 21 ) phy_write( eng, 6, 0x0020 );//06h[5]P5 loopback, 06h[6]P6 loopback in phy_marvell1()
513 … else phy_write( eng, 6, 0x0040 );//06h[5]P5 loopback, 06h[6]P6 loopback in phy_marvell1()
515 eng->phy.Adr = phy_addr_org; in phy_marvell1()
519 //------------------------------------------------------------
520 void recov_phy_marvell2 (MAC_ENGINE *eng) {//88E1512//88E15 10/12/14/18 in recov_phy_marvell2() argument
521 if ( eng->run.tm_tx_only ) { in recov_phy_marvell2()
523 else if ( eng->phy.loopback ) { in recov_phy_marvell2()
526 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_marvell2()
529 phy_write( eng, 22, 0x0006 ); in recov_phy_marvell2()
530 phy_clrset( eng, 18, 0x0008, 0x0000 );//clr set in recov_phy_marvell2()
531 phy_write( eng, 22, 0x0000 ); in recov_phy_marvell2()
536 //------------------------------------------------------------
538 void phy_marvell2 (MAC_ENGINE *eng) in phy_marvell2() argument
541 phy_write(eng, 22, 0x0002); in phy_marvell2()
542 eng->phy.PHY_15h = phy_read(eng, 21); in phy_marvell2()
543 eng->phy.PHY_15h &= ~GENMASK(5, 4); in phy_marvell2()
544 if (eng->arg.ctrl.b.phy_tx_delay_en) in phy_marvell2()
545 eng->phy.PHY_15h |= BIT(4); in phy_marvell2()
546 if (eng->arg.ctrl.b.phy_rx_delay_en) in phy_marvell2()
547 eng->phy.PHY_15h |= BIT(5); in phy_marvell2()
549 phy_write(eng, 21, eng->phy.PHY_15h); in phy_marvell2()
552 phy_write(eng, 22, 0x0000); in phy_marvell2()
554 if ( eng->run.tm_tx_only ) { in phy_marvell2()
555 phy_reset( eng ); in phy_marvell2()
557 else if ( eng->phy.loopback ) { in phy_marvell2()
560 phy_write( eng, 22, 0x0012 ); in phy_marvell2()
561 eng->phy.PHY_14h = phy_read( eng, 20 ); in phy_marvell2()
563 // if ( eng->phy.PHY_14h & 0x0020 ) { in phy_marvell2()
564 if ( ( eng->phy.PHY_14h & 0x003f ) != 0x0010 ) { in phy_marvell2()
565 …\n\n[Warning] Internal loopback funciton only support in copper mode[%04x]\n\n", eng->phy.PHY_14h); in phy_marvell2()
566 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Internal loopback funciton only support … in phy_marvell2()
567 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Internal loopback funciton only support… in phy_marvell2()
569 phy_write( eng, 20, ( eng->phy.PHY_14h & 0xffc0 ) | 0x8010 ); in phy_marvell2()
571 … phy_check_register ( eng, 20, 0x8000, 0x0000, 1, "wait 88E15 10/12/14/18 mode reset"); in phy_marvell2()
573 // temp_reg = phy_read( eng, 20 ); in phy_marvell2()
578 phy_write( eng, 22, 0x0002 ); in phy_marvell2()
579 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell2()
580 phy_clrset( eng, 21, 0x2040, 0x0040 );//clr set in phy_marvell2()
582 else if ( eng->run.speed_sel[ 1 ] ) { in phy_marvell2()
583 phy_clrset( eng, 21, 0x2040, 0x2000 );//clr set in phy_marvell2()
586 phy_clrset( eng, 21, 0x2040, 0x0000 );//clr set in phy_marvell2()
588 phy_write( eng, 22, 0x0000 ); in phy_marvell2()
590 phy_reset( eng ); in phy_marvell2()
595 if ( !eng->run.speed_sel[ 0 ] ) { in phy_marvell2()
596 … phy_check_register ( eng, 17, 0x0040, 0x0040, 10, "wait 88E15 10/12/14/18 link-up"); in phy_marvell2()
597 … phy_check_register ( eng, 17, 0x0040, 0x0000, 10, "wait 88E15 10/12/14/18 link-up"); in phy_marvell2()
598 … phy_check_register ( eng, 17, 0x0040, 0x0040, 10, "wait 88E15 10/12/14/18 link-up"); in phy_marvell2()
602 if ( eng->run.speed_sel[ 0 ] ) { in phy_marvell2()
605 phy_write( eng, 22, 0x0006 ); in phy_marvell2()
606 phy_clrset( eng, 18, 0x0000, 0x0008 );//clr set in phy_marvell2()
607 phy_write( eng, 22, 0x0000 ); in phy_marvell2()
610 phy_reset( eng ); in phy_marvell2()
611 phy_check_register ( eng, 17, 0x0400, 0x0400, 10, "wait 88E15 10/12/14/18 link-up"); in phy_marvell2()
614 // if ( !eng->phy.loopback ) in phy_marvell2()
615 //// if ( !eng->run.tm_tx_only ) in phy_marvell2()
616 // phy_check_register ( eng, 17, 0x0400, 0x0400, 10, "wait 88E15 10/12/14/18 link-up"); in phy_marvell2()
619 //// eng->phy.PHY_11h = phy_read( eng, PHY_SR ); in phy_marvell2()
620 //// } while ( !( ( eng->phy.PHY_11h & 0x0400 ) | eng->phy.loopback | ( Retry++ > 20 ) ) ); in phy_marvell2()
623 //------------------------------------------------------------
624 void phy_marvell3 (MAC_ENGINE *eng) in phy_marvell3() argument
632 eng->phy.PHY_1ch = phy_read( eng, 28 ); in phy_marvell3()
633 if (eng->run.is_rgmii) { in phy_marvell3()
634 if ( ( eng->phy.PHY_1ch & 0x0c00 ) != 0x0000 ) { in phy_marvell3()
635 …\n[Warning] Register 28, bit 10~11 must be 0 (RGMIIRX Edge-align Mode)[Reg1ch:%04x]\n\n", eng->phy… in phy_marvell3()
636 eng->phy.PHY_1ch = ( eng->phy.PHY_1ch & 0xf3ff ) | 0x0000; in phy_marvell3()
637 phy_write( eng, 28, eng->phy.PHY_1ch ); in phy_marvell3()
640 if ( ( eng->phy.PHY_1ch & 0x0c00 ) != 0x0800 ) { in phy_marvell3()
641 …f("\n\n[Warning] Register 28, bit 10~11 must be 2 (RMII Mode)[Reg1ch:%04x]\n\n", eng->phy.PHY_1ch); in phy_marvell3()
642 eng->phy.PHY_1ch = ( eng->phy.PHY_1ch & 0xf3ff ) | 0x0800; in phy_marvell3()
643 phy_write( eng, 28, eng->phy.PHY_1ch ); in phy_marvell3()
647 if ( eng->run.tm_tx_only ) { in phy_marvell3()
648 phy_reset( eng ); in phy_marvell3()
650 else if ( eng->phy.loopback ) { in phy_marvell3()
651 phy_reset( eng ); in phy_marvell3()
654 phy_reset( eng ); in phy_marvell3()
657 phy_check_register ( eng, 17, 0x0400, 0x0400, 1, "wait 88E3019 link-up"); in phy_marvell3()
660 //------------------------------------------------------------
661 void phy_broadcom (MAC_ENGINE *eng) in phy_broadcom() argument
665 phy_reset( eng ); in phy_broadcom()
667 if ( eng->run.TM_IEEE ) { in phy_broadcom()
668 if ( eng->run.ieee_sel == 0 ) { in phy_broadcom()
669 phy_write( eng, 25, 0x1f01 );//Force MDI //Measuring from channel A in phy_broadcom()
672 phy_clrset( eng, 24, 0x0000, 0x4000 );//clr set//Force Link in phy_broadcom()
673 // phy_write( eng, 0, eng->phy.PHY_00h ); in phy_broadcom()
674 // phy_write( eng, 30, 0x1000 ); in phy_broadcom()
680 if ( eng->run.speed_sel[ 1 ] ) { in phy_broadcom()
682 reg = phy_read( eng, 0x18 ) & 0xF; in phy_broadcom()
687 reg = phy_read( eng, 0x18 ) & 0xF; in phy_broadcom()
693 //------------------------------------------------------------
694 void recov_phy_broadcom0 (MAC_ENGINE *eng) {//BCM54612 in recov_phy_broadcom0() argument
695 phy_write( eng, 0, eng->phy.PHY_00h ); in recov_phy_broadcom0()
696 phy_write( eng, 9, eng->phy.PHY_09h ); in recov_phy_broadcom0()
697 // phy_write( eng, 24, eng->phy.PHY_18h | 0xf007 );//write reg 18h, shadow value 111 in recov_phy_broadcom0()
698 // phy_write( eng, 28, eng->phy.PHY_1ch | 0x8c00 );//write reg 1Ch, shadow value 00011 in recov_phy_broadcom0()
700 if ( eng->run.tm_tx_only ) { in recov_phy_broadcom0()
702 else if ( eng->phy.loopback ) { in recov_phy_broadcom0()
703 phy_write( eng, 0, eng->phy.PHY_00h ); in recov_phy_broadcom0()
709 //------------------------------------------------------------
710 //internal loop 1G : no loopback stub
713 void phy_broadcom0 (MAC_ENGINE *eng) in phy_broadcom0() argument
717 phy_reset(eng); in phy_broadcom0()
719 eng->phy.PHY_00h = phy_read( eng, PHY_REG_BMCR ); in phy_broadcom0()
720 eng->phy.PHY_09h = phy_read( eng, PHY_GBCR ); in phy_broadcom0()
722 phy_write( eng, 0, eng->phy.PHY_00h & ~BIT(10)); in phy_broadcom0()
728 phy_write(eng, 0x18, (0x7 << 12) | 0x7); in phy_broadcom0()
729 eng->phy.PHY_18h = phy_read(eng, 0x18); in phy_broadcom0()
730 PHY_new = eng->phy.PHY_18h & ~((0x7 << 12) | 0x7 | BIT(8)); in phy_broadcom0()
732 if (eng->arg.ctrl.b.phy_rx_delay_en) in phy_broadcom0()
734 phy_write(eng, 0x18, PHY_new); in phy_broadcom0()
741 phy_write(eng, 0x1c, 0x3 << 10); in phy_broadcom0()
742 eng->phy.PHY_1ch = phy_read(eng, 0x1c); in phy_broadcom0()
743 PHY_new = eng->phy.PHY_1ch & ~((0x1f << 10) | BIT(9)); in phy_broadcom0()
745 if (eng->arg.ctrl.b.phy_tx_delay_en) in phy_broadcom0()
747 phy_write(eng, 0x1c, PHY_new); in phy_broadcom0()
749 if ( eng->run.tm_tx_only ) { in phy_broadcom0()
750 phy_basic_setting(eng); in phy_broadcom0()
751 } else if (eng->phy.loopback) { in phy_broadcom0()
752 phy_basic_setting(eng); in phy_broadcom0()
753 /* reg1E[12]: force-link */ in phy_broadcom0()
754 if (strncmp((char *)eng->phy.phy_name, "BCM5421x", strlen("BCM5421x")) == 0) in phy_broadcom0()
755 phy_write(eng, 0x1e, BIT(12)); in phy_broadcom0()
757 if (eng->run.speed_sel[0]) { in phy_broadcom0()
758 phy_write(eng, 0x9, 0x1800); in phy_broadcom0()
759 phy_write(eng, 0x0, 0x0140); in phy_broadcom0()
760 phy_write(eng, 0x18, 0x8400); in phy_broadcom0()
761 } else if (eng->run.speed_sel[1]) { in phy_broadcom0()
762 phy_write(eng, 0x0, 0x2100); in phy_broadcom0()
763 phy_write(eng, 0x18, 0x8400); in phy_broadcom0()
765 phy_write(eng, 0x0, 0x0100); in phy_broadcom0()
766 phy_write(eng, 0x18, 0x8400); in phy_broadcom0()
772 //------------------------------------------------------------
773 void phy_realtek (MAC_ENGINE *eng) in phy_realtek() argument
776 phy_reset( eng ); in phy_realtek()
779 //------------------------------------------------------------
782 void phy_realtek0 (MAC_ENGINE *eng) in phy_realtek0() argument
785 eng->phy.RMIICK_IOMode |= PHY_Flag_RMIICK_IOMode_RTL8201E; in phy_realtek0()
787 phy_reset( eng ); in phy_realtek0()
789 eng->phy.PHY_19h = phy_read( eng, 25 ); in phy_realtek0()
791 if ( ( eng->phy.PHY_19h & 0x0400 ) == 0x0 ) { in phy_realtek0()
792 phy_write( eng, 25, eng->phy.PHY_19h | 0x0400 ); in phy_realtek0()
793 … printf("\n\n[Warning] Register 25, bit 10 must be 1 [Reg19h:%04x]\n\n", eng->phy.PHY_19h); in phy_realtek0()
794 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Register 25, bit 10 must be 1 [Reg19h:%0… in phy_realtek0()
795 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Register 25, bit 10 must be 1 [Reg19h:%… in phy_realtek0()
798 if ( eng->arg.ctrl.b.rmii_phy_in == 0 ) { in phy_realtek0()
799 if ( ( eng->phy.PHY_19h & 0x0800 ) == 0x0800 ) { in phy_realtek0()
800 phy_write( eng, 25, eng->phy.PHY_19h & 0xf7ff ); in phy_realtek0()
801 …ng] Register 25, bit 11 must be 0 (TXC should be output mode)[Reg19h:%04x]\n\n", eng->phy.PHY_19h); in phy_realtek0()
802 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Register 25, bit 11 must be 0 (TXC shoul… in phy_realtek0()
803 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Register 25, bit 11 must be 0 (TXC shou… in phy_realtek0()
806 if ( ( eng->phy.PHY_19h & 0x0800 ) == 0x0000 ) { in phy_realtek0()
807 phy_write( eng, 25, eng->phy.PHY_19h | 0x0800 ); in phy_realtek0()
808 …printf("\n\n[Warning] Register 25, bit 11 must be 1 (TXC should be input mode)[Reg19h:%04x]\n\n", … in phy_realtek0()
809 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Register 25, bit 11 must be 1 (TXC shoul… in phy_realtek0()
810 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Register 25, bit 11 must be 1 (TXC shou… in phy_realtek0()
814 if ( eng->run.TM_IEEE ) { in phy_realtek0()
815 phy_write( eng, 31, 0x0001 ); in phy_realtek0()
816 if ( eng->run.ieee_sel == 0 ) { in phy_realtek0()
817 phy_write( eng, 25, 0x1f01 );//Force MDI //Measuring from channel A in phy_realtek0()
820 phy_write( eng, 25, 0x1f00 );//Force MDIX //Measuring from channel B in phy_realtek0()
822 phy_write( eng, 31, 0x0000 ); in phy_realtek0()
826 //------------------------------------------------------------
827 void recov_phy_realtek1 (MAC_ENGINE *eng) {//RTL8211D in recov_phy_realtek1() argument
828 if ( eng->run.tm_tx_only ) { in recov_phy_realtek1()
829 if ( eng->run.TM_IEEE ) { in recov_phy_realtek1()
830 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek1()
831 if ( eng->run.ieee_sel == 0 ) {//Test Mode 1 in recov_phy_realtek1()
833 phy_write( eng, 31, 0x0002 ); in recov_phy_realtek1()
834 phy_write( eng, 2, 0xc203 ); in recov_phy_realtek1()
835 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek1()
836 phy_write( eng, 9, 0x0000 ); in recov_phy_realtek1()
840 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek1()
841 phy_write( eng, 9, 0x0000 ); in recov_phy_realtek1()
844 else if ( eng->run.speed_sel[ 1 ] ) { in recov_phy_realtek1()
846 phy_write( eng, 23, 0x2100 ); in recov_phy_realtek1()
847 phy_write( eng, 16, 0x016e ); in recov_phy_realtek1()
851 phy_write( eng, 31, 0x0006 ); in recov_phy_realtek1()
852 phy_write( eng, 0, 0x5a00 ); in recov_phy_realtek1()
853 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek1()
856 phy_reset( eng ); in recov_phy_realtek1()
857 } // End if ( eng->run.TM_IEEE ) in recov_phy_realtek1()
859 else if ( eng->phy.loopback ) { in recov_phy_realtek1()
860 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek1()
861 phy_write( eng, 31, 0x0000 ); // new in Rev. 1.6 in recov_phy_realtek1()
862 phy_write( eng, 0, 0x1140 ); // new in Rev. 1.6 in recov_phy_realtek1()
863 phy_write( eng, 20, 0x8040 ); // new in Rev. 1.6 in recov_phy_realtek1()
867 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek1()
868 phy_write( eng, 31, 0x0001 ); in recov_phy_realtek1()
869 phy_write( eng, 3, 0xdf41 ); in recov_phy_realtek1()
870 phy_write( eng, 2, 0xdf20 ); in recov_phy_realtek1()
871 phy_write( eng, 1, 0x0140 ); in recov_phy_realtek1()
872 phy_write( eng, 0, 0x00bb ); in recov_phy_realtek1()
873 phy_write( eng, 4, 0xb800 ); in recov_phy_realtek1()
874 phy_write( eng, 4, 0xb000 ); in recov_phy_realtek1()
876 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek1()
877 // phy_write( eng, 26, 0x0020 ); // Rev. 1.2 in recov_phy_realtek1()
878 phy_write( eng, 26, 0x0040 ); // new in Rev. 1.6 in recov_phy_realtek1()
879 phy_write( eng, 0, 0x1140 ); in recov_phy_realtek1()
880 // phy_write( eng, 21, 0x0006 ); // Rev. 1.2 in recov_phy_realtek1()
881 phy_write( eng, 21, 0x1006 ); // new in Rev. 1.6 in recov_phy_realtek1()
882 phy_write( eng, 23, 0x2100 ); in recov_phy_realtek1()
884 // else if ( eng->run.speed_sel[ 1 ] ) {//option in recov_phy_realtek1()
885 // phy_write( eng, 31, 0x0000 ); in recov_phy_realtek1()
886 // phy_write( eng, 9, 0x0200 ); in recov_phy_realtek1()
887 // phy_write( eng, 0, 0x1200 ); in recov_phy_realtek1()
889 // else if ( eng->run.speed_sel[ 2 ] ) {//option in recov_phy_realtek1()
890 // phy_write( eng, 31, 0x0000 ); in recov_phy_realtek1()
891 // phy_write( eng, 9, 0x0200 ); in recov_phy_realtek1()
892 // phy_write( eng, 4, 0x05e1 ); in recov_phy_realtek1()
893 // phy_write( eng, 0, 0x1200 ); in recov_phy_realtek1()
895 phy_reset( eng ); in recov_phy_realtek1()
897 } // End if ( eng->run.tm_tx_only ) in recov_phy_realtek1()
898 } // End void recov_phy_realtek1 (MAC_ENGINE *eng) in recov_phy_realtek1()
900 //------------------------------------------------------------
901 //internal loop 1G : no loopback stub
904 void phy_realtek1 (MAC_ENGINE *eng) in phy_realtek1() argument
907 if ( eng->run.tm_tx_only ) { in phy_realtek1()
908 if ( eng->run.TM_IEEE ) { in phy_realtek1()
909 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek1()
910 if ( eng->run.ieee_sel == 0 ) {//Test Mode 1 in phy_realtek1()
912 phy_write( eng, 31, 0x0002 ); in phy_realtek1()
913 phy_write( eng, 2, 0xc22b ); in phy_realtek1()
914 phy_write( eng, 31, 0x0000 ); in phy_realtek1()
915 phy_write( eng, 9, 0x2000 ); in phy_realtek1()
919 phy_write( eng, 31, 0x0000 ); in phy_realtek1()
920 phy_write( eng, 9, 0x8000 ); in phy_realtek1()
923 else if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek1()
924 if ( eng->run.ieee_sel == 0 ) {//From Channel A in phy_realtek1()
926 phy_write( eng, 23, 0xa102 ); in phy_realtek1()
927 phy_write( eng, 16, 0x01ae );//MDI in phy_realtek1()
931 phy_clrset( eng, 17, 0x0008, 0x0000 ); // clr set in phy_realtek1()
932 phy_write( eng, 23, 0xa102 ); // MDI in phy_realtek1()
933 phy_write( eng, 16, 0x010e ); in phy_realtek1()
937 … if ( eng->run.ieee_sel == 0 ) {//Diff. Voltage/TP-IDL/Jitter: Pseudo-random pattern in phy_realtek1()
938 phy_write( eng, 31, 0x0006 ); in phy_realtek1()
939 phy_write( eng, 0, 0x5a21 ); in phy_realtek1()
940 phy_write( eng, 31, 0x0000 ); in phy_realtek1()
942 else if ( eng->run.ieee_sel == 1 ) {//Harmonic: pattern in phy_realtek1()
943 phy_write( eng, 31, 0x0006 ); in phy_realtek1()
944 phy_write( eng, 2, 0x05ee ); in phy_realtek1()
945 phy_write( eng, 0, 0xff21 ); in phy_realtek1()
946 phy_write( eng, 31, 0x0000 ); in phy_realtek1()
949 phy_write( eng, 31, 0x0006 ); in phy_realtek1()
950 phy_write( eng, 2, 0x05ee ); in phy_realtek1()
951 phy_write( eng, 0, 0x0021 ); in phy_realtek1()
952 phy_write( eng, 31, 0x0000 ); in phy_realtek1()
957 phy_reset( eng ); in phy_realtek1()
960 else if ( eng->phy.loopback ) { in phy_realtek1()
961 phy_reset( eng ); in phy_realtek1()
963 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek1()
964 phy_write( eng, 20, 0x0042 );//new in Rev. 1.6 in phy_realtek1()
970 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek1()
971 phy_write( eng, 31, 0x0001 ); in phy_realtek1()
972 phy_write( eng, 3, 0xff41 ); in phy_realtek1()
973 phy_write( eng, 2, 0xd720 ); in phy_realtek1()
974 phy_write( eng, 1, 0x0140 ); in phy_realtek1()
975 phy_write( eng, 0, 0x00bb ); in phy_realtek1()
976 phy_write( eng, 4, 0xb800 ); in phy_realtek1()
977 phy_write( eng, 4, 0xb000 ); in phy_realtek1()
979 phy_write( eng, 31, 0x0007 ); in phy_realtek1()
980 phy_write( eng, 30, 0x0040 ); in phy_realtek1()
981 phy_write( eng, 24, 0x0008 ); in phy_realtek1()
983 phy_write( eng, 31, 0x0000 ); in phy_realtek1()
984 phy_write( eng, 9, 0x0300 ); in phy_realtek1()
985 phy_write( eng, 26, 0x0020 ); in phy_realtek1()
986 phy_write( eng, 0, 0x0140 ); in phy_realtek1()
987 phy_write( eng, 23, 0xa101 ); in phy_realtek1()
988 phy_write( eng, 21, 0x0200 ); in phy_realtek1()
989 phy_write( eng, 23, 0xa121 ); in phy_realtek1()
990 phy_write( eng, 23, 0xa161 ); in phy_realtek1()
991 phy_write( eng, 0, 0x8000 ); in phy_realtek1()
992 phy_wait_reset_done( eng ); in phy_realtek1()
997 // else if ( eng->run.speed_sel[ 1 ] ) {//option in phy_realtek1()
998 // phy_write( eng, 31, 0x0000 ); in phy_realtek1()
999 // phy_write( eng, 9, 0x0000 ); in phy_realtek1()
1000 // phy_write( eng, 4, 0x0061 ); in phy_realtek1()
1001 // phy_write( eng, 0, 0x1200 ); in phy_realtek1()
1004 // else if ( eng->run.speed_sel[ 2 ] ) {//option in phy_realtek1()
1005 // phy_write( eng, 31, 0x0000 ); in phy_realtek1()
1006 // phy_write( eng, 9, 0x0000 ); in phy_realtek1()
1007 // phy_write( eng, 4, 0x05e1 ); in phy_realtek1()
1008 // phy_write( eng, 0, 0x1200 ); in phy_realtek1()
1012 phy_reset( eng ); in phy_realtek1()
1015 } // End void phy_realtek1 (MAC_ENGINE *eng) in phy_realtek1()
1017 //------------------------------------------------------------
1018 void recov_phy_realtek2 (MAC_ENGINE *eng) in recov_phy_realtek2() argument
1022 if ( eng->run.tm_tx_only ) { in recov_phy_realtek2()
1023 if ( eng->run.TM_IEEE ) { in recov_phy_realtek2()
1024 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek2()
1026 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek2()
1027 phy_write( eng, 9, 0x0000 ); in recov_phy_realtek2()
1029 else if ( eng->run.speed_sel[ 1 ] ) { in recov_phy_realtek2()
1031 phy_write( eng, 31, 0x0007 ); in recov_phy_realtek2()
1032 phy_write( eng, 30, 0x002f ); in recov_phy_realtek2()
1033 phy_write( eng, 23, 0xd88f ); in recov_phy_realtek2()
1034 phy_write( eng, 30, 0x002d ); in recov_phy_realtek2()
1035 phy_write( eng, 24, 0xf050 ); in recov_phy_realtek2()
1036 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek2()
1037 phy_write( eng, 16, 0x006e ); in recov_phy_realtek2()
1041 phy_write( eng, 31, 0x0006 ); in recov_phy_realtek2()
1042 phy_write( eng, 0, 0x5a00 ); in recov_phy_realtek2()
1043 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek2()
1046 phy_write( eng, 31, 0x0005 ); in recov_phy_realtek2()
1047 phy_write( eng, 5, 0x8b86 ); in recov_phy_realtek2()
1048 phy_write( eng, 6, 0xe201 ); in recov_phy_realtek2()
1049 phy_write( eng, 31, 0x0007 ); in recov_phy_realtek2()
1050 phy_write( eng, 30, 0x0020 ); in recov_phy_realtek2()
1051 phy_write( eng, 21, 0x1108 ); in recov_phy_realtek2()
1052 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek2()
1057 else if ( eng->phy.loopback ) { in recov_phy_realtek2()
1060 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek2()
1062 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek2()
1063 phy_write( eng, 0, 0x8000 ); in recov_phy_realtek2()
1066 phy_wait_reset_done( eng ); in recov_phy_realtek2()
1070 phy_write( eng, 31, 0x0007 ); in recov_phy_realtek2()
1071 phy_write( eng, 30, 0x0042 ); in recov_phy_realtek2()
1072 phy_write( eng, 21, 0x0500 ); in recov_phy_realtek2()
1073 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek2()
1074 phy_write( eng, 0, 0x1140 ); in recov_phy_realtek2()
1075 phy_write( eng, 26, 0x0040 ); in recov_phy_realtek2()
1076 phy_write( eng, 31, 0x0007 ); in recov_phy_realtek2()
1077 phy_write( eng, 30, 0x002f ); in recov_phy_realtek2()
1078 phy_write( eng, 23, 0xd88f ); in recov_phy_realtek2()
1079 phy_write( eng, 30, 0x0023 ); in recov_phy_realtek2()
1080 phy_write( eng, 22, 0x0300 ); in recov_phy_realtek2()
1081 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek2()
1082 phy_write( eng, 21, 0x1006 ); in recov_phy_realtek2()
1083 phy_write( eng, 23, 0x2100 ); in recov_phy_realtek2()
1085 // else if ( eng->run.speed_sel[ 1 ] ) {//option in recov_phy_realtek2()
1086 // phy_write( eng, 31, 0x0000 ); in recov_phy_realtek2()
1087 // phy_write( eng, 9, 0x0200 ); in recov_phy_realtek2()
1088 // phy_write( eng, 0, 0x1200 ); in recov_phy_realtek2()
1090 // else if ( eng->run.speed_sel[ 2 ] ) {//option in recov_phy_realtek2()
1091 // phy_write( eng, 31, 0x0000 ); in recov_phy_realtek2()
1092 // phy_write( eng, 9, 0x0200 ); in recov_phy_realtek2()
1093 // phy_write( eng, 4, 0x05e1 ); in recov_phy_realtek2()
1094 // phy_write( eng, 0, 0x1200 ); in recov_phy_realtek2()
1097 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek2()
1098 phy_write( eng, 0, 0x1140 ); in recov_phy_realtek2()
1103 phy_check_register ( eng, 17, 0x0c02, 0x0000, 10, "clear RTL8211E"); in recov_phy_realtek2()
1108 } // End void recov_phy_realtek2 (MAC_ENGINE *eng) in recov_phy_realtek2()
1110 //------------------------------------------------------------
1111 //internal loop 1G : no loopback stub
1115 void phy_realtek2 (MAC_ENGINE *eng) in phy_realtek2() argument
1125 phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1126 phy_clrset( eng, 0, 0x0000, 0x8000 | eng->phy.PHY_00h ); // clr set // Rst PHY in phy_realtek2()
1127 phy_wait_reset_done( eng ); in phy_realtek2()
1131 if ( eng->run.tm_tx_only ) { in phy_realtek2()
1132 if ( eng->run.TM_IEEE ) { in phy_realtek2()
1134 phy_write( eng, 31, 0x0005 ); in phy_realtek2()
1135 phy_write( eng, 5, 0x8b86 ); in phy_realtek2()
1136 phy_write( eng, 6, 0xe200 ); in phy_realtek2()
1137 phy_write( eng, 31, 0x0007 ); in phy_realtek2()
1138 phy_write( eng, 30, 0x0020 ); in phy_realtek2()
1139 phy_write( eng, 21, 0x0108 ); in phy_realtek2()
1140 phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1142 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek2()
1144 phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1146 if ( eng->run.ieee_sel == 0 ) { in phy_realtek2()
1147 phy_write( eng, 9, 0x2000 );//Test Mode 1 in phy_realtek2()
1150 phy_write( eng, 9, 0x8000 );//Test Mode 4 in phy_realtek2()
1153 else if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek2()
1155 phy_write( eng, 31, 0x0007 ); in phy_realtek2()
1156 phy_write( eng, 30, 0x002f ); in phy_realtek2()
1157 phy_write( eng, 23, 0xd818 ); in phy_realtek2()
1158 phy_write( eng, 30, 0x002d ); in phy_realtek2()
1159 phy_write( eng, 24, 0xf060 ); in phy_realtek2()
1160 phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1162 if ( eng->run.ieee_sel == 0 ) { in phy_realtek2()
1163 phy_write( eng, 16, 0x00ae );//From Channel A in phy_realtek2()
1166 phy_write( eng, 16, 0x008e );//From Channel B in phy_realtek2()
1171 phy_write( eng, 31, 0x0006 ); in phy_realtek2()
1172 if ( eng->run.ieee_sel == 0 ) {//Diff. Voltage/TP-IDL/Jitter in phy_realtek2()
1173 phy_write( eng, 0, 0x5a21 ); in phy_realtek2()
1175 else if ( eng->run.ieee_sel == 1 ) {//Harmonic: �FF� pattern in phy_realtek2()
1176 phy_write( eng, 2, 0x05ee ); in phy_realtek2()
1177 phy_write( eng, 0, 0xff21 ); in phy_realtek2()
1180 phy_write( eng, 2, 0x05ee ); in phy_realtek2()
1181 phy_write( eng, 0, 0x0021 ); in phy_realtek2()
1183 phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1187 phy_basic_setting( eng ); in phy_realtek2()
1191 else if ( eng->phy.loopback ) { in phy_realtek2()
1193 phy_write( eng, 0, 0x0000 ); in phy_realtek2()
1194 phy_write( eng, 0, 0x8000 ); in phy_realtek2()
1196 phy_write( eng, 0, eng->phy.PHY_00h ); in phy_realtek2()
1199 phy_basic_setting( eng ); in phy_realtek2()
1201 phy_clrset( eng, 0, 0x0000, 0x8000 | eng->phy.PHY_00h );//clr set//Rst PHY in phy_realtek2()
1202 phy_wait_reset_done( eng ); in phy_realtek2()
1205 phy_basic_setting( eng ); in phy_realtek2()
1211 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek2()
1214 else if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek2()
1217 else if ( eng->run.speed_sel[ 2 ] ) { in phy_realtek2()
1221 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek2()
1224 phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1225 phy_write( eng, 0, 0x8000 ); in phy_realtek2()
1229 phy_write( eng, 31, 0x0007 ); in phy_realtek2()
1230 phy_write( eng, 30, 0x0042 ); in phy_realtek2()
1231 phy_write( eng, 21, 0x2500 ); in phy_realtek2()
1232 phy_write( eng, 30, 0x0023 ); in phy_realtek2()
1233 phy_write( eng, 22, 0x0006 ); in phy_realtek2()
1234 phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1235 phy_write( eng, 0, 0x0140 ); in phy_realtek2()
1236 phy_write( eng, 26, 0x0060 ); in phy_realtek2()
1237 phy_write( eng, 31, 0x0007 ); in phy_realtek2()
1238 phy_write( eng, 30, 0x002f ); in phy_realtek2()
1239 phy_write( eng, 23, 0xd820 ); in phy_realtek2()
1240 phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1241 phy_write( eng, 21, 0x0206 ); in phy_realtek2()
1242 phy_write( eng, 23, 0x2120 ); in phy_realtek2()
1243 phy_write( eng, 23, 0x2160 ); in phy_realtek2()
1250 // else if ( eng->run.speed_sel[ 1 ] ) {//option in phy_realtek2()
1252 // phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1253 // phy_write( eng, 9, 0x0000 ); in phy_realtek2()
1254 // phy_write( eng, 4, 0x05e1 ); in phy_realtek2()
1255 // phy_write( eng, 0, 0x1200 ); in phy_realtek2()
1258 // else if ( eng->run.speed_sel[ 2 ] ) {//option in phy_realtek2()
1260 // phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1261 // phy_write( eng, 9, 0x0000 ); in phy_realtek2()
1262 // phy_write( eng, 4, 0x0061 ); in phy_realtek2()
1263 // phy_write( eng, 0, 0x1200 ); in phy_realtek2()
1267 if ( eng->run.speed_sel[ 1 ] ) in phy_realtek2()
1271 phy_write( eng, 31, 0x0000 ); in phy_realtek2()
1272 phy_write( eng, 0, eng->phy.PHY_00h ); in phy_realtek2()
1283 phy_check_register ( eng, 17, 0x0c02 | 0xe000, check_value, 10, "set RTL8211E"); in phy_realtek2()
1288 } // End void phy_realtek2 (MAC_ENGINE *eng) in phy_realtek2()
1290 //------------------------------------------------------------
1291 void recov_phy_realtek3 (MAC_ENGINE *eng) {//RTL8211C in recov_phy_realtek3() argument
1292 if ( eng->run.tm_tx_only ) { in recov_phy_realtek3()
1293 if ( eng->run.TM_IEEE ) { in recov_phy_realtek3()
1294 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek3()
1295 phy_write( eng, 9, 0x0000 ); in recov_phy_realtek3()
1297 else if ( eng->run.speed_sel[ 1 ] ) { in recov_phy_realtek3()
1298 phy_write( eng, 17, eng->phy.PHY_11h ); in recov_phy_realtek3()
1299 phy_write( eng, 14, 0x0000 ); in recov_phy_realtek3()
1300 phy_write( eng, 16, 0x00a0 ); in recov_phy_realtek3()
1303 // phy_write( eng, 31, 0x0006 ); in recov_phy_realtek3()
1304 // phy_write( eng, 0, 0x5a00 ); in recov_phy_realtek3()
1305 // phy_write( eng, 31, 0x0000 ); in recov_phy_realtek3()
1311 else if ( eng->phy.loopback ) { in recov_phy_realtek3()
1312 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek3()
1313 phy_write( eng, 11, 0x0000 ); in recov_phy_realtek3()
1315 phy_write( eng, 12, 0x1006 ); in recov_phy_realtek3()
1318 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek3()
1319 phy_write( eng, 31, 0x0001 ); in recov_phy_realtek3()
1320 phy_write( eng, 4, 0xb000 ); in recov_phy_realtek3()
1321 phy_write( eng, 3, 0xff41 ); in recov_phy_realtek3()
1322 phy_write( eng, 2, 0xdf20 ); in recov_phy_realtek3()
1323 phy_write( eng, 1, 0x0140 ); in recov_phy_realtek3()
1324 phy_write( eng, 0, 0x00bb ); in recov_phy_realtek3()
1325 phy_write( eng, 4, 0xb800 ); in recov_phy_realtek3()
1326 phy_write( eng, 4, 0xb000 ); in recov_phy_realtek3()
1328 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek3()
1329 phy_write( eng, 25, 0x8c00 ); in recov_phy_realtek3()
1330 phy_write( eng, 26, 0x0040 ); in recov_phy_realtek3()
1331 phy_write( eng, 0, 0x1140 ); in recov_phy_realtek3()
1332 phy_write( eng, 14, 0x0000 ); in recov_phy_realtek3()
1333 phy_write( eng, 12, 0x1006 ); in recov_phy_realtek3()
1334 phy_write( eng, 23, 0x2109 ); in recov_phy_realtek3()
1339 //------------------------------------------------------------
1340 void phy_realtek3 (MAC_ENGINE *eng) in phy_realtek3() argument
1343 if ( eng->run.tm_tx_only ) { in phy_realtek3()
1344 if ( eng->run.TM_IEEE ) { in phy_realtek3()
1345 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek3()
1346 if ( eng->run.ieee_sel == 0 ) { //Test Mode 1 in phy_realtek3()
1347 phy_write( eng, 9, 0x2000 ); in phy_realtek3()
1349 else if ( eng->run.ieee_sel == 1 ) {//Test Mode 2 in phy_realtek3()
1350 phy_write( eng, 9, 0x4000 ); in phy_realtek3()
1352 else if ( eng->run.ieee_sel == 2 ) {//Test Mode 3 in phy_realtek3()
1353 phy_write( eng, 9, 0x6000 ); in phy_realtek3()
1356 phy_write( eng, 9, 0x8000 ); in phy_realtek3()
1359 else if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek3()
1360 eng->phy.PHY_11h = phy_read( eng, PHY_SR ); in phy_realtek3()
1361 phy_write( eng, 17, eng->phy.PHY_11h & 0xfff7 ); in phy_realtek3()
1362 phy_write( eng, 14, 0x0660 ); in phy_realtek3()
1364 if ( eng->run.ieee_sel == 0 ) { in phy_realtek3()
1365 phy_write( eng, 16, 0x00a0 );//MDI //From Channel A in phy_realtek3()
1368 phy_write( eng, 16, 0x0080 );//MDIX //From Channel B in phy_realtek3()
1372 // if ( eng->run.ieee_sel == 0 ) {//Pseudo-random pattern in phy_realtek3()
1373 // phy_write( eng, 31, 0x0006 ); in phy_realtek3()
1374 // phy_write( eng, 0, 0x5a21 ); in phy_realtek3()
1375 // phy_write( eng, 31, 0x0000 ); in phy_realtek3()
1377 // else if ( eng->run.ieee_sel == 1 ) {//�FF� pattern in phy_realtek3()
1378 // phy_write( eng, 31, 0x0006 ); in phy_realtek3()
1379 // phy_write( eng, 2, 0x05ee ); in phy_realtek3()
1380 // phy_write( eng, 0, 0xff21 ); in phy_realtek3()
1381 // phy_write( eng, 31, 0x0000 ); in phy_realtek3()
1384 // phy_write( eng, 31, 0x0006 ); in phy_realtek3()
1385 // phy_write( eng, 2, 0x05ee ); in phy_realtek3()
1386 // phy_write( eng, 0, 0x0021 ); in phy_realtek3()
1387 // phy_write( eng, 31, 0x0000 ); in phy_realtek3()
1392 phy_reset( eng ); in phy_realtek3()
1395 else if ( eng->phy.loopback ) { in phy_realtek3()
1396 phy_write( eng, 0, 0x9200 ); in phy_realtek3()
1397 phy_wait_reset_done( eng ); in phy_realtek3()
1400 phy_write( eng, 17, 0x401c ); in phy_realtek3()
1401 phy_write( eng, 12, 0x0006 ); in phy_realtek3()
1403 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek3()
1404 phy_write( eng, 11, 0x0002 ); in phy_realtek3()
1407 phy_basic_setting( eng ); in phy_realtek3()
1411 if ( eng->run.speed_sel[ 0 ] ) { in phy_realtek3()
1412 phy_write( eng, 31, 0x0001 ); in phy_realtek3()
1413 phy_write( eng, 4, 0xb000 ); in phy_realtek3()
1414 phy_write( eng, 3, 0xff41 ); in phy_realtek3()
1415 phy_write( eng, 2, 0xd720 ); in phy_realtek3()
1416 phy_write( eng, 1, 0x0140 ); in phy_realtek3()
1417 phy_write( eng, 0, 0x00bb ); in phy_realtek3()
1418 phy_write( eng, 4, 0xb800 ); in phy_realtek3()
1419 phy_write( eng, 4, 0xb000 ); in phy_realtek3()
1421 phy_write( eng, 31, 0x0000 ); in phy_realtek3()
1422 phy_write( eng, 25, 0x8400 ); in phy_realtek3()
1423 phy_write( eng, 26, 0x0020 ); in phy_realtek3()
1424 phy_write( eng, 0, 0x0140 ); in phy_realtek3()
1425 phy_write( eng, 14, 0x0210 ); in phy_realtek3()
1426 phy_write( eng, 12, 0x0200 ); in phy_realtek3()
1427 phy_write( eng, 23, 0x2109 ); in phy_realtek3()
1428 phy_write( eng, 23, 0x2139 ); in phy_realtek3()
1431 phy_reset( eng ); in phy_realtek3()
1434 } // End void phy_realtek3 (MAC_ENGINE *eng) in phy_realtek3()
1436 //------------------------------------------------------------
1441 void phy_realtek4 (MAC_ENGINE *eng) {//RTL8201F in phy_realtek4() argument
1443 eng->phy.RMIICK_IOMode |= PHY_Flag_RMIICK_IOMode_RTL8201F; in phy_realtek4()
1445 phy_write( eng, 31, 0x0007 ); in phy_realtek4()
1446 eng->phy.PHY_10h = phy_read( eng, 16 ); in phy_realtek4()
1448 if ( ( eng->phy.PHY_10h & 0x0008 ) == 0x0 ) { in phy_realtek4()
1449 phy_write( eng, 16, eng->phy.PHY_10h | 0x0008 ); in phy_realtek4()
1450 … printf("\n\n[Warning] Page 7 Register 16, bit 3 must be 1 [Reg10h_7:%04x]\n\n", eng->phy.PHY_10h); in phy_realtek4()
1451 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Page 7 Register 16, bit 3 must be 1 [Reg… in phy_realtek4()
1452 …if ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Page 7 Register 16, bit 3 must be 1 [Re… in phy_realtek4()
1455 if ( eng->arg.ctrl.b.rmii_phy_in == 0 ) { in phy_realtek4()
1456 if ( ( eng->phy.PHY_10h & 0x1000 ) == 0x1000 ) { in phy_realtek4()
1457 phy_write( eng, 16, eng->phy.PHY_10h & 0xefff ); in phy_realtek4()
1458 …7 Register 16, bit 12 must be 0 (TXC should be output mode)[Reg10h_7:%04x]\n\n", eng->phy.PHY_10h); in phy_realtek4()
1459 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Page 7 Register 16, bit 12 must be 0 (TX… in phy_realtek4()
1460 …f ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Page 7 Register 16, bit 12 must be 0 (TX… in phy_realtek4()
1463 if ( ( eng->phy.PHY_10h & 0x1000 ) == 0x0000 ) { in phy_realtek4()
1464 phy_write( eng, 16, eng->phy.PHY_10h | 0x1000 ); in phy_realtek4()
1465 …\n\n[Warning] Page 7 Register 16, bit 12 must be 1 (TXC should be input mode)[Reg10h_7:%04x]\n\n",… in phy_realtek4()
1466 …if ( eng->run.TM_IOTiming ) PRINTF( FP_IO, "\n\n[Warning] Page 7 Register 16, bit 12 must be 1 (TX… in phy_realtek4()
1467 …f ( !eng->run.tm_tx_only ) PRINTF( FP_LOG, "\n\n[Warning] Page 7 Register 16, bit 12 must be 1 (TX… in phy_realtek4()
1470 phy_write( eng, 31, 0x0000 ); in phy_realtek4()
1472 if ( eng->run.tm_tx_only ) { in phy_realtek4()
1473 if ( eng->run.TM_IEEE ) { in phy_realtek4()
1475 phy_write( eng, 31, 0x0004 ); in phy_realtek4()
1476 phy_write( eng, 16, 0x4077 ); in phy_realtek4()
1477 phy_write( eng, 21, 0xc5a0 ); in phy_realtek4()
1478 phy_write( eng, 31, 0x0000 ); in phy_realtek4()
1480 if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek4()
1481 phy_write( eng, 0, 0x8000 ); // Reset PHY in phy_realtek4()
1482 phy_wait_reset_done( eng ); in phy_realtek4()
1483 phy_write( eng, 24, 0x0310 ); // Disable ALDPS in phy_realtek4()
1485 if ( eng->run.ieee_sel == 0 ) {//From Channel A (RJ45 pair 1, 2) in phy_realtek4()
1486 phy_write( eng, 28, 0x40c2 ); //Force MDI in phy_realtek4()
1489 phy_write( eng, 28, 0x40c0 ); //Force MDIX in phy_realtek4()
1491 phy_write( eng, 0, 0x2100 ); //Force 100M/Full Duplex) in phy_realtek4()
1496 phy_reset( eng ); in phy_realtek4()
1499 else if ( eng->phy.loopback ) { in phy_realtek4()
1501 if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek4()
1502 // Enable 100M PCS loop back; RTL8201(F_FL_FN)-VB-CG_DataSheet_1.6.pdf in phy_realtek4()
1503 phy_write( eng, 31, 0x0000 ); in phy_realtek4()
1504 phy_write( eng, 0, 0x6100 ); in phy_realtek4()
1505 phy_write( eng, 31, 0x0007 ); in phy_realtek4()
1506 phy_write( eng, 16, 0x1FF8 ); in phy_realtek4()
1507 phy_write( eng, 16, 0x0FF8 ); in phy_realtek4()
1508 phy_write( eng, 31, 0x0000 ); in phy_realtek4()
1510 } else if ( eng->run.speed_sel[ 2 ] ) { in phy_realtek4()
1511 // Enable 10M PCS loop back; RTL8201(F_FL_FN)-VB-CG_DataSheet_1.6.pdf in phy_realtek4()
1512 phy_write( eng, 31, 0x0000 ); in phy_realtek4()
1513 phy_write( eng, 0, 0x4100 ); in phy_realtek4()
1514 phy_write( eng, 31, 0x0007 ); in phy_realtek4()
1515 phy_write( eng, 16, 0x1FF8 ); in phy_realtek4()
1516 phy_write( eng, 16, 0x0FF8 ); in phy_realtek4()
1517 phy_write( eng, 31, 0x0000 ); in phy_realtek4()
1523 if ( eng->run.speed_sel[ 1 ] ) { in phy_realtek4()
1524 … // Enable 100M MDI loop back Nway option; RTL8201(F_FL_FN)-VB-CG_DataSheet_1.6.pdf in phy_realtek4()
1525 phy_write( eng, 31, 0x0000 ); in phy_realtek4()
1526 phy_write( eng, 4, 0x01E1 ); in phy_realtek4()
1527 phy_write( eng, 0, 0x1200 ); in phy_realtek4()
1528 } else if ( eng->run.speed_sel[ 2 ] ) { in phy_realtek4()
1529 … // Enable 10M MDI loop back Nway option; RTL8201(F_FL_FN)-VB-CG_DataSheet_1.6.pdf in phy_realtek4()
1530 phy_write( eng, 31, 0x0000 ); in phy_realtek4()
1531 phy_write( eng, 4, 0x0061 ); in phy_realtek4()
1532 phy_write( eng, 0, 0x1200 ); in phy_realtek4()
1534 // phy_write( eng, 0, 0x8000 ); in phy_realtek4()
1535 // while ( phy_read( eng, 0 ) != 0x3100 ) {} in phy_realtek4()
1536 // while ( phy_read( eng, 0 ) != 0x3100 ) {} in phy_realtek4()
1537 // phy_write( eng, 0, eng->phy.PHY_00h ); in phy_realtek4()
1542 phy_check_register ( eng, 1, 0x0004, 0x0004, 10, "set RTL8201F"); in phy_realtek4()
1547 //------------------------------------------------------------
1549 void recov_phy_realtek5 (MAC_ENGINE *eng) in recov_phy_realtek5() argument
1552 if ( eng->run.tm_tx_only ) { in recov_phy_realtek5()
1553 if ( eng->run.TM_IEEE ) { in recov_phy_realtek5()
1554 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek5()
1556 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek5()
1557 phy_write( eng, 9, 0x0000 ); in recov_phy_realtek5()
1559 else if ( eng->run.speed_sel[ 1 ] ) { in recov_phy_realtek5()
1561 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek5()
1562 phy_write( eng, 24, 0x2118 );//RGMII in recov_phy_realtek5()
1563 phy_write( eng, 9, 0x0200 ); in recov_phy_realtek5()
1564 phy_write( eng, 0, 0x9200 ); in recov_phy_realtek5()
1565 phy_wait_reset_done( eng ); in recov_phy_realtek5()
1569 phy_write( eng, 31, 0x0c80 ); in recov_phy_realtek5()
1570 phy_write( eng, 16, 0x5a00 ); in recov_phy_realtek5()
1571 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek5()
1572 phy_write( eng, 4, 0x01e1 ); in recov_phy_realtek5()
1573 phy_write( eng, 9, 0x0200 ); in recov_phy_realtek5()
1574 phy_write( eng, 0, 0x9200 ); in recov_phy_realtek5()
1575 phy_wait_reset_done( eng ); in recov_phy_realtek5()
1581 else if ( eng->phy.loopback ) { in recov_phy_realtek5()
1584 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_realtek5()
1586 phy_write( eng, 31, 0x0a43 ); in recov_phy_realtek5()
1587 phy_write( eng, 24, 0x2118 ); in recov_phy_realtek5()
1588 phy_write( eng, 0, 0x1040 ); in recov_phy_realtek5()
1590 // else if ( eng->run.speed_sel[ 1 ] ) {//option in recov_phy_realtek5()
1591 // phy_write( eng, 31, 0x0000 ); in recov_phy_realtek5()
1592 // phy_write( eng, 9, 0x0200 ); in recov_phy_realtek5()
1593 // phy_write( eng, 0, 0x1200 ); in recov_phy_realtek5()
1595 // else if ( eng->run.speed_sel[ 2 ] ) {//option in recov_phy_realtek5()
1596 // phy_write( eng, 31, 0x0000 ); in recov_phy_realtek5()
1597 // phy_write( eng, 9, 0x0200 ); in recov_phy_realtek5()
1598 // phy_write( eng, 4, 0x01e1 ); in recov_phy_realtek5()
1599 // phy_write( eng, 0, 0x1200 ); in recov_phy_realtek5()
1602 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek5()
1603 phy_write( eng, 0, 0x1040 ); in recov_phy_realtek5()
1609 phy_write( eng, 31, 0x0a43 ); in recov_phy_realtek5()
1610 phy_check_register ( eng, 26, 0x0004, 0x0000, 10, "clear RTL8211F"); in recov_phy_realtek5()
1611 phy_write( eng, 31, 0x0000 ); in recov_phy_realtek5()
1618 //------------------------------------------------------------
1619 void phy_realtek5 (MAC_ENGINE *eng) {//RTL8211F in phy_realtek5() argument
1626 phy_write(eng, 0x1f, 0xd08); in phy_realtek5()
1629 reg = phy_read(eng, 0x11); in phy_realtek5()
1630 if (eng->arg.ctrl.b.phy_tx_delay_en) in phy_realtek5()
1634 phy_write(eng, 0x11, reg); in phy_realtek5()
1637 reg = phy_read(eng, 0x15); in phy_realtek5()
1638 if (eng->arg.ctrl.b.phy_rx_delay_en) in phy_realtek5()
1642 phy_write(eng, 0x15, reg); in phy_realtek5()
1645 phy_write(eng, 0x1f, 0x0); in phy_realtek5()
1647 if (eng->run.tm_tx_only) { in phy_realtek5()
1648 if (eng->run.TM_IEEE) { in phy_realtek5()
1649 if (eng->run.speed_sel[0]) { in phy_realtek5()
1651 phy_write(eng, 31, 0x0000); in phy_realtek5()
1652 if (eng->run.ieee_sel == 0) { // Test Mode 1 in phy_realtek5()
1653 phy_write(eng, 9, 0x0200); in phy_realtek5()
1654 } else if (eng->run.ieee_sel == in phy_realtek5()
1655 1) { // Test Mode 2 in phy_realtek5()
1656 phy_write(eng, 9, 0x0400); in phy_realtek5()
1658 phy_write(eng, 9, 0x0800); in phy_realtek5()
1660 } else if (eng->run.speed_sel[1]) { // option in phy_realtek5()
1662 phy_write(eng, 31, 0x0000); in phy_realtek5()
1663 if (eng->run.ieee_sel == in phy_realtek5()
1664 0) { // Output MLT-3 from Channel A in phy_realtek5()
1665 phy_write(eng, 24, 0x2318); in phy_realtek5()
1666 } else { // Output MLT-3 from Channel B in phy_realtek5()
1667 phy_write(eng, 24, 0x2218); in phy_realtek5()
1669 phy_write(eng, 9, 0x0000); in phy_realtek5()
1670 phy_write(eng, 0, 0x2100); in phy_realtek5()
1673 // 0: For Diff. Voltage/TP-IDL/Jitter with EEE in phy_realtek5()
1674 // 1: For Diff. Voltage/TP-IDL/Jitter without in phy_realtek5()
1675 // EEE 2: For Harmonic (all "1" patten) with EEE in phy_realtek5()
1676 // 3: For Harmonic (all "1" patten) without EEE in phy_realtek5()
1679 phy_write(eng, 31, 0x0000); in phy_realtek5()
1680 phy_write(eng, 9, 0x0000); in phy_realtek5()
1681 phy_write(eng, 4, 0x0061); in phy_realtek5()
1682 if ((eng->run.ieee_sel & 0x1) == 0) { // with in phy_realtek5()
1684 phy_write(eng, 25, 0x0853); in phy_realtek5()
1686 phy_write(eng, 25, 0x0843); in phy_realtek5()
1688 phy_write(eng, 0, 0x9200); in phy_realtek5()
1689 phy_wait_reset_done(eng); in phy_realtek5()
1691 if ((eng->run.ieee_sel & 0x6) == in phy_realtek5()
1692 0) { // For Diff. Voltage/TP-IDL/Jitter in phy_realtek5()
1693 phy_write(eng, 31, 0x0c80); in phy_realtek5()
1694 phy_write(eng, 18, 0x0115); in phy_realtek5()
1695 phy_write(eng, 16, 0x5a21); in phy_realtek5()
1696 } else if ((eng->run.ieee_sel & 0x6) == in phy_realtek5()
1697 0x2) { // For Harmonic (all "1" in phy_realtek5()
1699 phy_write(eng, 31, 0x0c80); in phy_realtek5()
1700 phy_write(eng, 18, 0x0015); in phy_realtek5()
1701 phy_write(eng, 16, 0xff21); in phy_realtek5()
1703 phy_write(eng, 31, 0x0c80); in phy_realtek5()
1704 phy_write(eng, 18, 0x0015); in phy_realtek5()
1705 phy_write(eng, 16, 0x0021); in phy_realtek5()
1707 phy_write(eng, 31, 0x0000); in phy_realtek5()
1710 phy_reset(eng); in phy_realtek5()
1712 } else if (eng->phy.loopback) { in phy_realtek5()
1713 phy_reset(eng); in phy_realtek5()
1715 if (eng->run.speed_sel[0]) { in phy_realtek5()
1718 phy_write(eng, 31, 0x0a43); in phy_realtek5()
1719 phy_write(eng, 0, 0x8000); in phy_realtek5()
1723 phy_wait_reset_done(eng); in phy_realtek5()
1727 phy_write(eng, 0, 0x0140); in phy_realtek5()
1728 phy_write(eng, 24, 0x2d18); in phy_realtek5()
1735 if (eng->run.speed_sel[1]) in phy_realtek5()
1741 phy_write(eng, 31, 0x0a43); in phy_realtek5()
1742 phy_write(eng, 0, 0x8000); in phy_realtek5()
1743 phy_wait_reset_done(eng); in phy_realtek5()
1747 phy_write(eng, 31, 0x0000); in phy_realtek5()
1748 phy_write(eng, 0, eng->phy.PHY_00h); in phy_realtek5()
1759 phy_write(eng, 31, 0x0a43); in phy_realtek5()
1760 phy_check_register(eng, 26, 0x0004 | 0x0038, check_value, 10, in phy_realtek5()
1762 phy_write(eng, 31, 0x0000); in phy_realtek5()
1771 //------------------------------------------------------------
1772 //It is a LAN Switch, only support 1G internal loopback test.
1773 void phy_realtek6 (MAC_ENGINE *eng) in phy_realtek6() argument
1776 if (eng->run.tm_tx_only) { in phy_realtek6()
1778 } else if (eng->phy.loopback) { in phy_realtek6()
1781 phy_basic_setting(eng); in phy_realtek6()
1783 phy_clrset(eng, 0, 0x0000, in phy_realtek6()
1784 0x8000 | eng->phy.PHY_00h); // clr set//Rst PHY in phy_realtek6()
1785 phy_wait_reset_done(eng); in phy_realtek6()
1788 phy_basic_setting(eng); in phy_realtek6()
1793 } // End void phy_realtek6 (MAC_ENGINE *eng) in phy_realtek6()
1795 //------------------------------------------------------------
1796 void phy_smsc (MAC_ENGINE *eng) in phy_smsc() argument
1798 phy_reset(eng); in phy_smsc()
1801 //------------------------------------------------------------
1802 void phy_micrel (MAC_ENGINE *eng) in phy_micrel() argument
1805 phy_reset( eng ); in phy_micrel()
1807 // phy_write( eng, 24, 0x0600 ); in phy_micrel()
1810 //------------------------------------------------------------
1811 void phy_micrel0 (MAC_ENGINE *eng) in phy_micrel0() argument
1816 //Reg1Fh[7] = 1 : 50MHz Mode, XI(pin 9) is 50MHz(oscilator). in phy_micrel0()
1817 eng->phy.PHY_1fh = phy_read( eng, 31 ); in phy_micrel0()
1818 …if ( eng->phy.PHY_1fh & 0x0080 ) sprintf((char *)eng->phy.phy_name, "%s-50MHz Mode", eng->phy.phy_… in phy_micrel0()
1819 …else sprintf((char *)eng->phy.phy_name, "%s-25MHz Mode", eng->phy.phy_… in phy_micrel0()
1821 if ( eng->run.TM_IEEE ) { in phy_micrel0()
1822 phy_clrset( eng, 0, 0x0000, 0x8000 | eng->phy.PHY_00h );//clr set//Rst PHY in phy_micrel0()
1823 phy_wait_reset_done( eng ); in phy_micrel0()
1825 phy_clrset( eng, 31, 0x0000, 0x2000 );//clr set//1Fh[13] = 1: Disable auto MDI/MDI-X in phy_micrel0()
1826 phy_basic_setting( eng ); in phy_micrel0()
1827 phy_clrset( eng, 31, 0x0000, 0x0800 );//clr set//1Fh[11] = 1: Force link pass in phy_micrel0()
1832 phy_reset( eng ); in phy_micrel0()
1834 //Reg16h[6] = 1 : RMII B-to-B override in phy_micrel0()
1835 //Reg16h[1] = 1(default): RMII override in phy_micrel0()
1836 phy_clrset( eng, 22, 0x0000, 0x0042 );//clr set in phy_micrel0()
1839 if ( eng->phy.PHY_1fh & 0x0080 ) in phy_micrel0()
1840 phy_clrset( eng, 31, 0x0000, 0x0080 );//clr set//Reset PHY will clear Reg1Fh[7] in phy_micrel0()
1843 //------------------------------------------------------------
1844 //external loop 1G : NOT Support
1847 //internal loop 1G : no loopback stub
1850 void phy_micrel1 (MAC_ENGINE *eng) in phy_micrel1() argument
1855 phy_write( eng, 13, 0x0002 ); in phy_micrel1()
1856 phy_write( eng, 14, 0x0004 ); in phy_micrel1()
1857 phy_write( eng, 13, 0x4002 ); in phy_micrel1()
1858 temp = phy_read( eng, 14 ); in phy_micrel1()
1860 phy_write( eng, 14, temp & 0xff0f | 0x0000 ); in phy_micrel1()
1861 // phy_write( eng, 14, temp & 0xff0f | 0x00f0 ); in phy_micrel1()
1862 printf("Reg2.4 = %04x -> %04x\n", temp, phy_read( eng, 14 )); in phy_micrel1()
1864 phy_write( eng, 13, 0x0002 ); in phy_micrel1()
1865 phy_write( eng, 14, 0x0005 ); in phy_micrel1()
1866 phy_write( eng, 13, 0x4002 ); in phy_micrel1()
1867 temp = phy_read( eng, 14 ); in phy_micrel1()
1872 phy_write( eng, 14, 0x0000 ); in phy_micrel1()
1873 // phy_write( eng, 14, 0xffff ); in phy_micrel1()
1874 printf("Reg2.5 = %04x -> %04x\n", temp, phy_read( eng, 14 )); in phy_micrel1()
1876 phy_write( eng, 13, 0x0002 ); in phy_micrel1()
1877 phy_write( eng, 14, 0x0008 ); in phy_micrel1()
1878 phy_write( eng, 13, 0x4002 ); in phy_micrel1()
1879 temp = phy_read( eng, 14 ); in phy_micrel1()
1882 // phy_write( eng, 14, temp & 0xffe0 | 0x0000 ); in phy_micrel1()
1883 phy_write( eng, 14, temp & 0xffe0 | 0x001f ); in phy_micrel1()
1884 printf("Reg2.8 = %04x -> %04x\n", temp, phy_read( eng, 14 )); in phy_micrel1()
1887 if ( eng->run.tm_tx_only ) { in phy_micrel1()
1888 if ( eng->run.TM_IEEE ) { in phy_micrel1()
1889 phy_reset( eng ); in phy_micrel1()
1892 phy_reset( eng ); in phy_micrel1()
1895 else if ( eng->phy.loopback ) { in phy_micrel1()
1896 phy_reset( eng ); in phy_micrel1()
1899 if ( eng->run.speed_sel[ 0 ] ) { in phy_micrel1()
1900 phy_reset( eng );//DON'T support for 1G external loopback testing in phy_micrel1()
1903 phy_reset( eng ); in phy_micrel1()
1908 //------------------------------------------------------------
1913 void phy_micrel2 (MAC_ENGINE *eng) in phy_micrel2() argument
1916 if ( eng->run.tm_tx_only ) { in phy_micrel2()
1917 if ( eng->run.TM_IEEE ) { in phy_micrel2()
1918 phy_reset( eng ); in phy_micrel2()
1921 phy_reset( eng ); in phy_micrel2()
1924 else if ( eng->phy.loopback ) { in phy_micrel2()
1925 phy_reset( eng ); in phy_micrel2()
1928 if ( eng->run.speed_sel[ 1 ] ) in phy_micrel2()
1929 phy_reset( eng ); in phy_micrel2()
1931 phy_reset( eng ); in phy_micrel2()
1935 //------------------------------------------------------------
1936 void recov_phy_vitesse (MAC_ENGINE *eng) {//VSC8601 in recov_phy_vitesse() argument
1937 if ( eng->run.tm_tx_only ) { in recov_phy_vitesse()
1938 // if ( eng->run.TM_IEEE ) { in recov_phy_vitesse()
1943 else if ( eng->phy.loopback ) { in recov_phy_vitesse()
1946 if ( eng->run.speed_sel[ 0 ] ) { in recov_phy_vitesse()
1947 phy_write( eng, 24, eng->phy.PHY_18h ); in recov_phy_vitesse()
1948 phy_write( eng, 18, eng->phy.PHY_12h ); in recov_phy_vitesse()
1953 //------------------------------------------------------------
1954 void phy_vitesse (MAC_ENGINE *eng) in phy_vitesse() argument
1957 if ( eng->run.tm_tx_only ) { in phy_vitesse()
1958 if ( eng->run.TM_IEEE ) { in phy_vitesse()
1959 phy_reset( eng ); in phy_vitesse()
1962 phy_reset( eng ); in phy_vitesse()
1965 else if ( eng->phy.loopback ) { in phy_vitesse()
1966 phy_reset( eng ); in phy_vitesse()
1969 if ( eng->run.speed_sel[ 0 ] ) { in phy_vitesse()
1970 eng->phy.PHY_18h = phy_read( eng, 24 ); in phy_vitesse()
1971 eng->phy.PHY_12h = phy_read( eng, PHY_INER ); in phy_vitesse()
1973 phy_reset( eng ); in phy_vitesse()
1975 phy_write( eng, 24, eng->phy.PHY_18h | 0x0001 ); in phy_vitesse()
1976 phy_write( eng, 18, eng->phy.PHY_12h | 0x0020 ); in phy_vitesse()
1979 phy_reset( eng ); in phy_vitesse()
1984 //------------------------------------------------------------
1985 void recov_phy_atheros (MAC_ENGINE *eng) {//AR8035 in recov_phy_atheros() argument
1986 if (eng->run.tm_tx_only) { in recov_phy_atheros()
1987 if (eng->run.TM_IEEE) { in recov_phy_atheros()
1990 } else if (eng->phy.loopback) { in recov_phy_atheros()
1993 eng, 11, 0x0000, in recov_phy_atheros()
1996 eng, 17, 0x0001, in recov_phy_atheros()
1997 0x0000); // clr set//Enable external loopback: Reg11h[0] = 1 in recov_phy_atheros()
2001 //------------------------------------------------------------
2002 void phy_atheros (MAC_ENGINE *eng) in phy_atheros() argument
2005 phy_write(eng, 29, 0x000b); in phy_atheros()
2006 eng->phy.PHY_1eh = phy_read(eng, 30); in phy_atheros()
2007 if (eng->phy.PHY_1eh & 0x8000) { in phy_atheros()
2010 eng->phy.PHY_1eh); in phy_atheros()
2011 if (eng->run.TM_IOTiming) in phy_atheros()
2015 eng->phy.PHY_1eh); in phy_atheros()
2016 if (!eng->run.tm_tx_only) in phy_atheros()
2020 eng->phy.PHY_1eh); in phy_atheros()
2022 phy_write(eng, 30, eng->phy.PHY_1eh & 0x7fff); in phy_atheros()
2024 // phy_write( eng, 30, (eng->phy.PHY_1eh & 0x7fff) | 0x8000 ); in phy_atheros()
2027 phy_write(eng, 29, 0x0000); in phy_atheros()
2028 eng->phy.PHY_1eh = phy_read(eng, 30); in phy_atheros()
2029 if (eng->phy.PHY_1eh & 0x8000) { in phy_atheros()
2032 eng->phy.PHY_1eh); in phy_atheros()
2033 if (eng->run.TM_IOTiming) in phy_atheros()
2037 eng->phy.PHY_1eh); in phy_atheros()
2038 if (!eng->run.tm_tx_only) in phy_atheros()
2042 eng->phy.PHY_1eh); in phy_atheros()
2044 phy_write(eng, 30, eng->phy.PHY_1eh & 0x7fff); in phy_atheros()
2046 // phy_write( eng, 30, (eng->phy.PHY_1eh & 0x7fff) | 0x8000 ); in phy_atheros()
2049 phy_write(eng, 29, 0x0005); in phy_atheros()
2050 eng->phy.PHY_1eh = phy_read(eng, 30); in phy_atheros()
2051 if (eng->phy.PHY_1eh & 0x0100) { in phy_atheros()
2054 eng->phy.PHY_1eh); in phy_atheros()
2055 if (eng->run.TM_IOTiming) in phy_atheros()
2059 eng->phy.PHY_1eh); in phy_atheros()
2060 if (!eng->run.tm_tx_only) in phy_atheros()
2064 eng->phy.PHY_1eh); in phy_atheros()
2066 phy_write(eng, 30, eng->phy.PHY_1eh & 0xfeff); in phy_atheros()
2068 // phy_write( eng, 30, (eng->phy.PHY_1eh & 0xfeff) | 0x0100 ); in phy_atheros()
2071 phy_write(eng, 13, 0x0007); in phy_atheros()
2072 phy_write(eng, 14, 0x8016); in phy_atheros()
2073 phy_write(eng, 13, 0x4007); in phy_atheros()
2074 eng->phy.PHY_0eh = phy_read(eng, 14); in phy_atheros()
2075 if ((eng->phy.PHY_0eh & 0x0018) != 0x0018) { in phy_atheros()
2078 eng->phy.PHY_0eh); in phy_atheros()
2079 if (eng->run.TM_IOTiming) in phy_atheros()
2083 eng->phy.PHY_0eh); in phy_atheros()
2084 if (!eng->run.tm_tx_only) in phy_atheros()
2088 eng->phy.PHY_0eh); in phy_atheros()
2092 phy_write(eng, 14, (eng->phy.PHY_0eh & 0xffe7) | 0x0018); in phy_atheros()
2095 if (eng->run.tm_tx_only) { in phy_atheros()
2096 if (eng->run.TM_IEEE) { in phy_atheros()
2097 phy_write(eng, 0, eng->phy.PHY_00h); in phy_atheros()
2099 phy_write(eng, 0, eng->phy.PHY_00h); in phy_atheros()
2101 } else if (eng->phy.loopback) { in phy_atheros()
2102 phy_write(eng, 0, eng->phy.PHY_00h); in phy_atheros()
2105 eng, 11, 0x8000, in phy_atheros()
2108 eng, 17, 0x0000, in phy_atheros()
2109 0x0001); // clr set//Enable external loopback: Reg11h[0] = 1 in phy_atheros()
2111 phy_write(eng, 0, eng->phy.PHY_00h | 0x8000); in phy_atheros()
2118 //------------------------------------------------------------
2119 void phy_default (MAC_ENGINE *eng) in phy_default() argument
2123 phy_reset(eng); in phy_default()
2126 //------------------------------------------------------------
2128 //------------------------------------------------------------
2130 * @return 1->addr found, 0->else
2132 uint32_t phy_find_addr(MAC_ENGINE *eng) in phy_find_addr() argument
2140 phy_addr_org = eng->phy.Adr; in phy_find_addr()
2141 value = phy_read(eng, PHY_REG_ID_1); in phy_find_addr()
2144 if ((ret == 0) && (eng->arg.ctrl.b.skip_phy_id_check)) { in phy_find_addr()
2145 value = phy_read(eng, PHY_REG_BMCR); in phy_find_addr()
2146 if ((value & BIT(15)) && (0 == eng->arg.ctrl.b.skip_phy_init)) { in phy_find_addr()
2151 ret = 1; in phy_find_addr()
2156 for (eng->phy.Adr = 0; eng->phy.Adr < 32; eng->phy.Adr++) { in phy_find_addr()
2157 value = phy_read(eng, PHY_REG_ID_1); in phy_find_addr()
2159 ret = 1; in phy_find_addr()
2166 eng->phy.Adr = eng->arg.phy_addr; in phy_find_addr()
2168 if (0 == eng->arg.ctrl.b.skip_phy_init) { in phy_find_addr()
2169 if (ret == 1) { in phy_find_addr()
2170 if (phy_addr_org != eng->phy.Adr) { in phy_find_addr()
2171 phy_scan_id(eng, STD_OUT); in phy_find_addr()
2174 phy_scan_id(eng, STD_OUT); in phy_find_addr()
2175 FindErr(eng, Err_Flag_PHY_Type); in phy_find_addr()
2180 eng->phy.id1 = phy_read(eng, PHY_REG_ID_1); in phy_find_addr()
2181 eng->phy.id2 = phy_read(eng, PHY_REG_ID_2); in phy_find_addr()
2182 value = (eng->phy.id2 << 16) | eng->phy.id1; in phy_find_addr()
2184 if (0 == eng->arg.ctrl.b.skip_phy_id_check) { in phy_find_addr()
2186 sprintf((char *)eng->phy.phy_name, "--"); in phy_find_addr()
2187 if (0 == eng->arg.ctrl.b.skip_phy_init) in phy_find_addr()
2188 FindErr(eng, Err_Flag_PHY_Type); in phy_find_addr()
2195 //------------------------------------------------------------
2196 void phy_set00h (MAC_ENGINE *eng) in phy_set00h() argument
2200 eng->phy.PHY_00h = BIT(8); in phy_set00h()
2202 if (eng->run.speed_sel[0]) in phy_set00h()
2203 eng->phy.PHY_00h |= BIT(6); in phy_set00h()
2204 else if (eng->run.speed_sel[1]) in phy_set00h()
2205 eng->phy.PHY_00h |= BIT(13); in phy_set00h()
2207 if (eng->phy.loopback) in phy_set00h()
2208 eng->phy.PHY_00h |= BIT(14); in phy_set00h()
2215 value = (p_eng->phy.id1 << 16) | (p_eng->phy.id2 & p_phy->id2_mask); in phy_check_id()
2216 id = (p_phy->id1 << 16) | (p_phy->id2 & p_phy->id2_mask); in phy_check_id()
2220 return 1; in phy_check_id()
2225 void phy_select(MAC_ENGINE *eng, PHY_ENGINE *phyeng) in phy_select() argument
2232 sprintf((char *)eng->phy.phy_name, "default"); in phy_select()
2233 phyeng->fp_set = phy_default; in phy_select()
2234 phyeng->fp_clr = NULL; in phy_select()
2236 if (eng->phy.default_phy) { in phy_select()
2241 if (phy_check_id(eng, p_phy)) { in phy_select()
2242 sprintf((char *)eng->phy.phy_name, in phy_select()
2243 (char *)p_phy->name); in phy_select()
2244 phyeng->fp_set = p_phy->cfg.fp_set; in phy_select()
2245 phyeng->fp_clr = p_phy->cfg.fp_clr; in phy_select()
2251 if (eng->arg.ctrl.b.skip_phy_init) { in phy_select()
2252 phyeng->fp_set = NULL; in phy_select()
2253 phyeng->fp_clr = NULL; in phy_select()
2254 } else if (eng->arg.ctrl.b.skip_phy_deinit) { in phy_select()
2255 phyeng->fp_clr = NULL; in phy_select()
2259 //------------------------------------------------------------
2260 void recov_phy (MAC_ENGINE *eng, PHY_ENGINE *phyeng) in recov_phy() argument
2264 if (phyeng->fp_clr != NULL) in recov_phy()
2265 (*phyeng->fp_clr)( eng ); in recov_phy()
2268 //------------------------------------------------------------
2269 void init_phy (MAC_ENGINE *eng, PHY_ENGINE *phyeng) in init_phy() argument
2274 phy_dump(eng); in init_phy()
2276 phy_set00h(eng); in init_phy()
2277 if (phyeng->fp_set != NULL) in init_phy()
2278 (*phyeng->fp_set)(eng); in init_phy()
2281 phy_dump(eng); in init_phy()