Lines Matching +full:0 +full:x10000010
8 #define SYS_REST 0x1e6e2040
9 #define SYS_REST_CLR 0x1e6e2044
12 #define DP_TX_INT_CLEAR 0x1e6eb040
13 #define DP_TX_INT_STATUS 0x1e6eb044
15 #define DP_TX_IRQ_CFG 0x1e6eb080
16 #define DP_TX_EVENT_CFG 0x1e6eb084
18 #define DP_AUX_REQ_CFG 0x1e6eb088
19 #define DP_AUX_ADDR_LEN 0x1e6eb08c
20 #define DP_AUX_STATUS 0x1e6eb0b0
22 #define DP_AUX_W_D_0 0x1e6eb090
23 #define DP_AUX_W_D_4 0x1e6eb094
24 #define DP_AUX_W_D_8 0x1e6eb098
25 #define DP_AUX_W_D_C 0x1e6eb09c
27 #define DP_AUX_R_D_0 0x1e6eb0a0
28 #define DP_AUX_R_D_4 0x1e6eb0a4
29 #define DP_AUX_R_D_8 0x1e6eb0a8
30 #define DP_AUX_R_D_C 0x1e6eb0ac
32 #define DP_TX_MAIN_SET 0x1e6eb0c0
33 #define DP_TX_MAIN_PAT 0x1e6eb0e4
34 #define DP_TX_PHY_PAT 0x1e6eb0e8
35 #define DP_TX_CUS_PAT_0 0x1e6eb0ec
36 #define DP_TX_CUS_PAT_1 0x1e6eb0f0
37 #define DP_TX_CUS_PAT_2 0x1e6eb0f4
38 #define DP_TX_MAIN_CFG 0x1e6eb0fc
39 #define DP_TX_PHY_SET 0x1e6eb104
40 #define DP_TX_PHY_CFG 0x1e6eb108
41 #define DP_TX_RES_CFG 0x1e6eb118
44 #define MP_SCU410 0x1e6e2410
45 #define MP_SCU414 0x1e6e2414
46 #define MP_SCU418 0x1e6e2418
47 #define MP_SCU4b0 0x1e6e24b0
48 #define MP_SCU4b4 0x1e6e24b4
49 #define MP_SCU4b8 0x1e6e24b8
51 #define I2C_GBASE 0x1e78a000
52 #define I2C_DEV_OFFSET 0x80
54 #define I2C0_BASE 0x1e78a080
55 #define I2C0_TIMMING_O 0x04
56 #define I2C0_COUNT_O 0x0c
57 #define I2C0_INT_O 0x10
58 #define I2C0_INT_STATUS_O 0x14
59 #define I2C0_EXECUTE_O 0x18
61 #define I2C0_BUFF 0x1e78ac00
62 #define I2C_BUFF_OFFSET 0x20
65 #define RD_EQ3 0x80
66 #define RD_EQ2 0x40
67 #define RD_EQ1 0x20
68 #define RD_EQ0 0x10
69 #define RD_FG1 0x08
70 #define RD_FG0 0x04
71 #define RD_SW1 0x02
72 #define RD_SW0 0x01
75 #define AUX_CMD_W 0x80000010
78 #define AUX_CMD_R 0x90000010
81 #define I2C_M_CMD_W 0x40000010
83 #define I2C_M_EA_CMD_W 0x40010010
86 #define I2C_M_CMD_R 0x50000010
88 #define I2C_M_EA_CMD_R 0x50010010
91 #define I2C_CMD_W 0x00000010
93 #define I2C_EA_CMD_W 0x00010010
96 #define I2C_CMD_R 0x10000010
98 #define I2C_EA_CMD_R 0x10010010
100 #define AUX_CMD_TIMEOUT 0x8000
101 #define AUX_CMD_DONE 0x4000
104 #define DP_RATE_1_62 0x0000
105 #define DP_RATE_2_70 0x0100
106 #define DP_RATE_5_40 0x0200
109 #define DP_DEEMP_0 0x00000000
110 #define DP_DEEMP_1 0x11000000
111 #define DP_DEEMP_2 0x22000000
114 #define DP_SSCG_ON 0x00000010
115 #define DP_SSCG_OFF 0x00000000
118 #define DP_TX_RDY_TEST 0x11003300
119 #define DP_PHY_INIT_CFG 0x00113021
120 #define DP_TX_PAT_HBR2 0x00050100
121 #define DP_TX_PAT_TPS1 0x10000100
123 #define DP_TX_PLTPAT_0 0x3e0f83e0
124 #define DP_TX_PLTPAT_1 0x0f83e0f8
125 #define DP_TX_PLTPAT_2 0x0000f83e
127 #define DP_PY_PAT 0x00000642
128 #define DP_PY_PAT_PRB7 0x01000000
129 #define DP_PY_PAT_SCRB 0x00001000
130 #define DP_PY_PAT_CUS 0x10000000
132 #define DP_TX_MAIN_NOR 0x00000020
133 #define DP_TX_MAIN_ADV 0x00001020
134 #define DP_TX_PY_RESET 0x00000001
135 #define DP_TX_MAIN_TRA 0x03000000
136 #define DP_TX_RDY_25201 0x00000200
138 #define DP_TX_HIGH_SPEED 0x000C0000
139 #define DP_TX_NOR_SPEED 0x00000000
141 #define DP_TX_D_INT_CFG 0x00C00000
142 #define DP_TX_A_INT_CFG 0x00F80000
145 #define F_EMPHASIS_NULL 0x00000001 // No emphasis : 2
146 #define F_EMPHASIS 0x00000002 // Emphasis : 1-0-2
147 #define F_EMPHASIS_1 0x00000004 // Emphasis 1 : 2-0-1
148 #define F_RES_HIGH 0x00000008
149 #define F_PAT_PRBS7 0x00000010 // PRBS7 pattern
150 #define F_PAT_PLTPAT 0x00000020 // PLTPAT pattern
151 #define F_PAT_HBR2CPAT 0x00000040 // HBR2CPAT pattern
152 #define F_PAT_D10_2 0x00000080 // D10_2 and TPS1 pattern
153 #define F_PAT_AUX 0x00000100 // Aux testing pattern
154 #define F_SHOW_SWING 0x00000200 // Show swing level
155 #define F_EXE_AUTO 0x00000400 // Enter auto mode
162 #define PRINT_SWING_0 printf("DP Swing Level 0!\n")
166 #define PRINT_DEEMP_0 printf("DP Pre - Emphasis Level 0!\n")
170 #define PRINT_EMPVAL_0 printf("DP Pre - Emphasis Level 0 !\n")