Lines Matching refs:DBG_A_SUB
37 #define DBG_A_SUB 0x00000010 /* DBG_AUTO_SUBFUNS */ macro
475 DBG(DBG_A_SUB, "1.A_C_E Set Link Pattern\n"); in Adjust_CR_EQ_Train()
485 DBG(DBG_A_SUB, "2.A_C_E W 0x102 set 0x%x\n", AUX_Data[0]); in Adjust_CR_EQ_Train()
499 DBG(DBG_A_SUB, "3.A_C_E W 0x103 - 0x106 set\n"); in Adjust_CR_EQ_Train()
507 DBG(DBG_A_SUB, "4.A_C_E R 0x200 - 0x205 read back\n"); in Adjust_CR_EQ_Train()
522 DBG(DBG_A_SUB, "5.A_C_E R 0x206 read back\n"); in Adjust_CR_EQ_Train()
526 DBG(DBG_A_SUB, "6.A_C_E R 0x207 read back\n"); in Adjust_CR_EQ_Train()
560 DBG(DBG_A_SUB, "6.A_C_E Set Phy config %d\n", DE_Level); in Adjust_CR_EQ_Train()
562 DBG(DBG_A_SUB, "Link AUX_W_Level is 0x%x\n", AUX_W_Level); in Adjust_CR_EQ_Train()
574 DBG(DBG_A_SUB, "7.A_C_E W 0x103 - 0x106 set\n"); in Adjust_CR_EQ_Train()
581 DBG(DBG_A_SUB, "8.A_C_E R 0x200 - 0x205 read back\n"); in Adjust_CR_EQ_Train()
609 DBG(DBG_A_SUB, "1.Link R 0x101 read back\n"); in Link_Train_Flow()
618 DBG(DBG_A_SUB, "2.Link W 0x101 clear\n"); in Link_Train_Flow()
635 DBG(DBG_A_SUB, "3.Link W 0x100 set\n"); in Link_Train_Flow()
638 DBG(DBG_A_SUB, "4.Link R 0x101 read back\n"); in Link_Train_Flow()
647 DBG(DBG_A_SUB, "5.Link W 0x101 clear\n"); in Link_Train_Flow()
662 DBG(DBG_A_SUB, "6.Link R 0x101 read back\n"); in Link_Train_Flow()
671 DBG(DBG_A_SUB, "7.Link W 0x101 clear\n"); in Link_Train_Flow()
684 DBG(DBG_A_SUB, "8.Link Main Link Ready\n"); in Link_Train_Flow()