12 #define SD_ITAP_DLY			0xFF180314  macro
109 		zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK,  in arasan_zynqmp_tap_hs()
111 		zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYENA_MASK,  in arasan_zynqmp_tap_hs()
113 		zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYSEL_MASK,  in arasan_zynqmp_tap_hs()
115 		zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, 0x0);  in arasan_zynqmp_tap_hs()
125 		zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK,  in arasan_zynqmp_tap_hs()
127 		zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYENA_MASK,  in arasan_zynqmp_tap_hs()
129 		zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYSEL_MASK,  in arasan_zynqmp_tap_hs()
131 		zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, 0x0);  in arasan_zynqmp_tap_hs()
146 		zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK,  in arasan_zynqmp_tap_ddr50()
148 		zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYENA_MASK,  in arasan_zynqmp_tap_ddr50()
151 			zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYSEL_MASK,  in arasan_zynqmp_tap_ddr50()
154 			zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYSEL_MASK,  in arasan_zynqmp_tap_ddr50()
156 		zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, 0x0);  in arasan_zynqmp_tap_ddr50()
166 		zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK,  in arasan_zynqmp_tap_ddr50()
168 		zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYENA_MASK,  in arasan_zynqmp_tap_ddr50()
171 			zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYSEL_MASK,  in arasan_zynqmp_tap_ddr50()
174 			zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYSEL_MASK,  in arasan_zynqmp_tap_ddr50()
176 		zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, 0x0);  in arasan_zynqmp_tap_ddr50()