Lines Matching +full:clock +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0
19 * as a standard unregistered SO-DIMM. */ in get_spd()
20 if (spd->dimm_type == 0) { in get_spd()
21 spd->dimm_type = 0x4; in get_spd()
31 * Factors to consider for clock adjust: in fsl_ddr_board_options()
32 * - number of chips on bus in fsl_ddr_board_options()
33 * - position of slot in fsl_ddr_board_options()
34 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
35 * - ??? in fsl_ddr_board_options()
37 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
41 popts->clk_adjust = 7; in fsl_ddr_board_options()
45 * - frequency in fsl_ddr_board_options()
46 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
48 popts->cpo_override = 9; in fsl_ddr_board_options()
51 * Factors to consider for write data delay: in fsl_ddr_board_options()
52 * - number of DIMMs in fsl_ddr_board_options()
54 * 1 = 1/4 clock delay in fsl_ddr_board_options()
55 * 2 = 1/2 clock delay in fsl_ddr_board_options()
56 * 3 = 3/4 clock delay in fsl_ddr_board_options()
57 * 4 = 1 clock delay in fsl_ddr_board_options()
58 * 5 = 5/4 clock delay in fsl_ddr_board_options()
59 * 6 = 3/2 clock delay in fsl_ddr_board_options()
61 popts->write_data_delay = 3; in fsl_ddr_board_options()
64 * Factors to consider for half-strength driver enable: in fsl_ddr_board_options()
65 * - number of DIMMs installed in fsl_ddr_board_options()
67 popts->half_strength_driver_enable = 0; in fsl_ddr_board_options()