tbs/tbs2910/tbs2910.cfg

1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include "asm/arch/mx6-ddr.h"
16 DATA 4, CCM_CCGR0, 0x00C03F3F
17 DATA 4, CCM_CCGR1, 0x0030FC03
18 DATA 4, CCM_CCGR2, 0x0FFFC000
19 DATA 4, CCM_CCGR3, 0x3FF00000
20 DATA 4, CCM_CCGR4, 0x00FFF300
21 DATA 4, CCM_CCGR5, 0x0F0000C3
22 DATA 4, CCM_CCGR6, 0x000003FF
24 DATA 4, CCM_CCOSR, 0x000000fb
27 DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF
28 /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
29 DATA 4, MX6_IOMUXC_GPR6, 0x77177717
30 DATA 4, MX6_IOMUXC_GPR7, 0x77177717
36  * 4x256Mx16 DDR3L-1066 7-7-7
40 DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
42 DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030
43 DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030
44 DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030
45 DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030
46 DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030
47 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
48 DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030
49 DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030
51 DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000
53 DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
54 /* set pad calibration type to DDR3 */
55 DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
56 /* ZQ calibration */
57 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
59 DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001f001f
60 DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001f001f
61 DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001f001f
62 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001f001f
64 DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
65 DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
66 DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
67 DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
68 DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
69 DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
70 DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
71 DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
73 DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43000300
74 DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03000300
75 DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43000300
76 DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03000300
77 /* start delay line calibration */
78 DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
80 DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E7974
82 DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64
84 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
86 DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
87 /* tXPR=0x8e+1,SDE2RST=0x10-2,RST2CKE=0x23-2 */
88 DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023
90 DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040
92 DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00011117
93 DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00011117
94 /* cs0, 15-bit row, 10-bit column, BL 8, 64-bit bus */
95 DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000
97 DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
99 DATA 4, MX6_MMDC_P0_MDASP, 0x00000047
101 DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030
102 DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031
103 DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032
104 DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
105 /* externel chip ZQ calibration */
106 DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
108 DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
110 DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576
112 DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
114 DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000