Lines Matching refs:CREG_AXI_M_SLV1
463 #define CREG_AXI_M_SLV1(m) ((void __iomem *)(CREG_BASE + 0x020 * (m) + 0x004)) macro
484 writel(0x63111111, CREG_AXI_M_SLV1(M_HS_CORE)); in init_memory_bridge()
490 writel(0x77777777, CREG_AXI_M_SLV1(M_HS_RTT)); in init_memory_bridge()
496 writel(0x88888888, CREG_AXI_M_SLV1(M_AXI_TUN)); in init_memory_bridge()
502 writel(0x77777777, CREG_AXI_M_SLV1(M_HDMI_VIDEO)); in init_memory_bridge()
508 writel(0x77777777, CREG_AXI_M_SLV1(M_HDMI_AUDIO)); in init_memory_bridge()
514 writel(0x77999999, CREG_AXI_M_SLV1(M_USB_HOST)); in init_memory_bridge()
520 writel(0x77999999, CREG_AXI_M_SLV1(M_ETHERNET)); in init_memory_bridge()
526 writel(0x77999999, CREG_AXI_M_SLV1(M_SDIO)); in init_memory_bridge()
532 writel(0x77777777, CREG_AXI_M_SLV1(M_GPU)); in init_memory_bridge()
538 writel(0x77777777, CREG_AXI_M_SLV1(M_DMAC_0)); in init_memory_bridge()
544 writel(0x77777777, CREG_AXI_M_SLV1(M_DMAC_1)); in init_memory_bridge()
550 writel(0x60000000, CREG_AXI_M_SLV1(M_DVFS)); in init_memory_bridge()