Lines Matching +full:read +full:- +full:strobe +full:- +full:delay

1 /* SPDX-License-Identifier: GPL-2.0 */
5  * Refer doc/README.imximage for more details about how-to configure
22 #include "asm/arch/mx6-ddr.h"
30 /* DATA STROBE */
77  * Read Data Bit Delay
95 /* DQS gating, read delay, write delay calibration values */
101 /* Read calibration */
115  * in DDR3, 64-bit mode, only MMDC0 is init
129 /* CS0_END = 2304MB in step da 256Mb -> [(2304*8/256) - 1] */
132 /* SDE_1=0; ROW=3; BL=1; DSIZ=2 -> 64 bit */
144 /*ZQ - Calibrationi */
169 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */