59  * existed on earlier boards; the workaround moved the DDR
79 		printf("DDR: failed to read SPD from addr %u\n", i2c_address);  in get_spd()
91 	struct ccsr_ddr __iomem *ddr =  in fixed_sdram()  local
94 	out_be32(&ddr->cs0_bnds,	0x0000007f);  in fixed_sdram()
95 	out_be32(&ddr->cs1_bnds,	0x008000ff);  in fixed_sdram()
96 	out_be32(&ddr->cs2_bnds,	0x00000000);  in fixed_sdram()
97 	out_be32(&ddr->cs3_bnds,	0x00000000);  in fixed_sdram()
99 	out_be32(&ddr->cs0_config,	0x80010101);  in fixed_sdram()
100 	out_be32(&ddr->cs1_config,	0x80010101);  in fixed_sdram()
101 	out_be32(&ddr->cs2_config,	0x00000000);  in fixed_sdram()
102 	out_be32(&ddr->cs3_config,	0x00000000);  in fixed_sdram()
104 	out_be32(&ddr->timing_cfg_3,	0x00000000);  in fixed_sdram()
105 	out_be32(&ddr->timing_cfg_0,	0x00220802);  in fixed_sdram()
106 	out_be32(&ddr->timing_cfg_1,	0x38377322);  in fixed_sdram()
107 	out_be32(&ddr->timing_cfg_2,	0x0fa044C7);  in fixed_sdram()
109 	out_be32(&ddr->sdram_cfg,	0x4300C000);  in fixed_sdram()
110 	out_be32(&ddr->sdram_cfg_2,	0x24401000);  in fixed_sdram()
112 	out_be32(&ddr->sdram_mode,	0x23C00542);  in fixed_sdram()
113 	out_be32(&ddr->sdram_mode_2,	0x00000000);  in fixed_sdram()
115 	out_be32(&ddr->sdram_interval,	0x05080100);  in fixed_sdram()
116 	out_be32(&ddr->sdram_md_cntl,	0x00000000);  in fixed_sdram()
117 	out_be32(&ddr->sdram_data_init,	0x00000000);  in fixed_sdram()
118 	out_be32(&ddr->sdram_clk_cntl,	0x03800000);  in fixed_sdram()
124 	  out_be32(&ddr->sdram_cfg, CONFIG_SYS_DDR_CONTROL | 0x20000000);  in fixed_sdram()
126 	  out_be32(&ddr->sdram_cfg, CONFIG_SYS_DDR_CONTROL);  in fixed_sdram()