samsung/common/board.c

1 // SPDX-License-Identifier: GPL-2.0+
25 #include <i2c.h>
27 #include <dwc3-uboot.h>
80 	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);  in board_init()
82 	if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {  in board_init()
84 		return -1;  in board_init()
92 	gd->ram_size -= size;  in board_init()
93 	gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;  in board_init()
105 		gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);  in dram_init()
119 		gd->bd->bi_dram[i].start = addr;  in dram_init_banksize()
120 		gd->bd->bi_dram[i].size = size;  in dram_init_banksize()
135 			      (uart_id - PERIPH_ID_UART0));  in board_uart_init()
159 	board_i2c_init(gd->fdt_blob);  in board_early_init_f()
187 	config->bank = fdtdec_get_int(blob, node, "bank", 0);  in decode_sromc()
188 	config->width = fdtdec_get_int(blob, node, "width", 2);  in decode_sromc()
190 	err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,  in decode_sromc()
195 		return -FDT_ERR_NOTFOUND;  in decode_sromc()
209 	node = decode_sromc(gd->fdt_blob, &config);  in board_eth_init()
214 	node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);  in board_eth_init()
221 	base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");  in board_eth_init()
224 		return -1;  in board_eth_init()
231 		return -1;  in board_eth_init()
285 	if (ret && ret != -ENODEV) {  in board_late_init()
287 		gd->flags &= ~GD_FLG_SILENT;  in board_late_init()
289 		printf("cros-ec communications failure %d\n", ret);  in board_late_init()
291 		panic("Cannot init cros-ec device");  in board_late_init()
292 		return -1;  in board_late_init()
331 	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,  in reset_misc()
332 			"samsung,emmc-reset");  in reset_misc()
336 	gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpio", 0,  in reset_misc()
344 		 *	  required by 'JEDEC Standard No.84-A441' (eMMC)  in reset_misc()