19 	return 0;  in checkboard()
28 	writew(0x0000, &gpio->pacr);	/* GETHER */  in init_gpio()
29 	writew(0x0001, &gpio->pbcr);	/* INTC */  in init_gpio()
30 	writew(0x0000, &gpio->pccr);	/* PWMU, INTC */  in init_gpio()
31 	writew(0xeaff, &gpio->pecr);	/* GPIO */  in init_gpio()
32 	writew(0x0000, &gpio->pfcr);	/* WDT */  in init_gpio()
33 	writew(0x0000, &gpio->phcr);	/* SPI1 */  in init_gpio()
34 	writew(0x0000, &gpio->picr);	/* SDHI */  in init_gpio()
35 	writew(0x0003, &gpio->pkcr);	/* SerMux */  in init_gpio()
36 	writew(0x0000, &gpio->plcr);	/* SerMux */  in init_gpio()
37 	writew(0x0000, &gpio->pmcr);	/* RIIC */  in init_gpio()
38 	writew(0x0000, &gpio->pncr);	/* USB, SGPIO */  in init_gpio()
39 	writew(0x0000, &gpio->pocr);	/* SGPIO */  in init_gpio()
40 	writew(0xd555, &gpio->pqcr);	/* GPIO */  in init_gpio()
41 	writew(0x0000, &gpio->prcr);	/* RIIC */  in init_gpio()
42 	writew(0x0000, &gpio->pscr);	/* RIIC */  in init_gpio()
43 	writeb(0x00, &gpio->pudr);  in init_gpio()
44 	writew(0x5555, &gpio->pucr);	/* Debug LED */  in init_gpio()
45 	writew(0x0000, &gpio->pvcr);	/* RSPI */  in init_gpio()
46 	writew(0x0000, &gpio->pwcr);	/* EVC */  in init_gpio()
47 	writew(0x0000, &gpio->pxcr);	/* LBSC */  in init_gpio()
48 	writew(0x0000, &gpio->pycr);	/* LBSC */  in init_gpio()
49 	writew(0x0000, &gpio->pzcr);	/* eMMC */  in init_gpio()
50 	writew(0xfe00, &gpio->psel0);  in init_gpio()
51 	writew(0xff00, &gpio->psel3);  in init_gpio()
52 	writew(0x771f, &gpio->psel4);  in init_gpio()
53 	writew(0x00ff, &gpio->psel6);  in init_gpio()
54 	writew(0xfc00, &gpio->psel7);  in init_gpio()
56 	writeb(0x10, &sermux->smr0);	/* SMR0: SerMux mode 0 */  in init_gpio()
67 	writew(0x0100, &phy->reset);		/* set reset */  in init_usb_phy()
69 	writew(0x0002, &phy->portsel);  in init_usb_phy()
70 	writel(0x0001, &port->port1sel);	/* port1 = Host */  in init_usb_phy()
71 	writew(0x0111, &phy->reset);		/* clear reset */  in init_usb_phy()
73 	writew(0x4000, &common0->suspmode);  in init_usb_phy()
74 	writew(0x4000, &common1->suspmode);  in init_usb_phy()
77 	writel(0x00000000, &align->ehcidatac);  in init_usb_phy()
78 	writel(0x00000000, &align->ohcidatac);  in init_usb_phy()
86 	writew(readw(&gpio->pgcr) | 0x0004, &gpio->pgcr);  in init_gether_mdio()
87 	writeb(readb(&gpio->pgdr) | 0x02, &gpio->pgdr);	/* Use ET0-MDIO */  in init_gether_mdio()
103 	val = (mac[0] << 24) | (mac[1] << 16) | (mac[2] << 8) | mac[3];  in set_mac_to_sh_giga_eth_register()
111  * Area 0(phys 0x00000000), so we have to map it.
115  * 0	0xa0000000	0x40000000	1	128M	0	1
116  * 1	0xa8000000	0x48000000	1	128M	0	1
117  * 2	0xb0000000	0x50000000	1	128M	0	1
118  * 3	0xb8000000	0x58000000	1	128M	0	1
119  * 4	0x80000000	0x40000000	1	128M	1	1
120  * 5	0x88000000	0x48000000	1	128M	1	1
121  * 6	0x90000000	0x50000000	1	128M	1	1
122  * 7	0x98000000	0x58000000	1	128M	1	1
129 	writel(0x00000004, &mmu->mmucr);  in set_pmb_on_board_init()
132 	writel(0, PMB_ADDR_BASE(0));  in set_pmb_on_board_init()
133 	writel(0, PMB_DATA_BASE(0));  in set_pmb_on_board_init()
135 	/* add PMB for SDRAM(0x40000000 - 0x47ffffff) */  in set_pmb_on_board_init()
137 	writel(mk_pmb_addr_val(0xa0), PMB_ADDR_BASE(0));  in set_pmb_on_board_init()
138 	writel(mk_pmb_data_val(0x40, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(0));  in set_pmb_on_board_init()
139 	writel(mk_pmb_addr_val(0xb0), PMB_ADDR_BASE(2));  in set_pmb_on_board_init()
140 	writel(mk_pmb_data_val(0x50, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(2));  in set_pmb_on_board_init()
141 	writel(mk_pmb_addr_val(0xb8), PMB_ADDR_BASE(3));  in set_pmb_on_board_init()
142 	writel(mk_pmb_data_val(0x58, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(3));  in set_pmb_on_board_init()
143 	writel(mk_pmb_addr_val(0x80), PMB_ADDR_BASE(4));  in set_pmb_on_board_init()
144 	writel(mk_pmb_data_val(0x40, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(4));  in set_pmb_on_board_init()
145 	writel(mk_pmb_addr_val(0x90), PMB_ADDR_BASE(6));  in set_pmb_on_board_init()
146 	writel(mk_pmb_data_val(0x50, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(6));  in set_pmb_on_board_init()
147 	writel(mk_pmb_addr_val(0x98), PMB_ADDR_BASE(7));  in set_pmb_on_board_init()
148 	writel(mk_pmb_data_val(0x58, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(7));  in set_pmb_on_board_init()
159 	return 0;  in board_init()
166 	writew(readw(&gpio->pgcr) | 0x0040, &gpio->pgcr);  in board_mmc_init()
167 	writeb(readb(&gpio->pgdr) & ~0x08, &gpio->pgdr); /* Reset */  in board_mmc_init()
169 	writeb(readb(&gpio->pgdr) | 0x08, &gpio->pgdr);	/* Release reset */  in board_mmc_init()
180 	spi = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);  in get_sh_eth_mac_raw()
194 	return 0;  in get_sh_eth_mac_raw()
201 	mac_string[SH7752EVB_ETHERNET_MAC_SIZE] = 0x00;	/* terminate */  in get_sh_eth_mac()
203 	return 0;  in get_sh_eth_mac()
221 	for (i = 0; i < SH7752EVB_ETHERNET_NUM_CH; i++) {  in init_ethernet_mac()
223 		if (i == 0)  in init_ethernet_mac()
239 	return 0;  in board_late_init()
259 		for (i = 0; i < SH7752EVB_ETHERNET_NUM_CH; i++) {  in do_write_mac()
264 		return 0;  in do_write_mac()
268 	memset(mac_string, 0xff, sizeof(mac_string));  in do_write_mac()
273 	spi = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);  in do_write_mac()
297 	return 0;  in do_write_mac()