Lines Matching +full:0 +full:x00020002
26 #define SD2CKCR 0xE615026C
27 #define SD_97500KHZ 0x7
38 while (!(readl(dbsc3_0_base + reg) & BIT(0))) in dbsc_wait()
44 u32 r0 = 0; in spl_init_sys()
46 writel(0xa5a5a500, 0xe6020004); in spl_init_sys()
47 writel(0xa5a5a500, 0xe6030004); in spl_init_sys()
51 "mcr 15, 0, %0, cr7, cr5, 0 \n" in spl_init_sys()
53 "mcr 15, 0, %0, cr7, cr5, 6 \n" in spl_init_sys()
55 "mrc 15, 0, %0, cr1, cr0, 0 \n" in spl_init_sys()
56 "orr %0, #0x1800 \n" in spl_init_sys()
57 "mcr 15, 0, %0, cr1, cr0, 0 \n" in spl_init_sys()
65 { 0x0090, 0x00000000 }, in spl_init_pfc()
66 { 0x0094, 0x00000000 }, in spl_init_pfc()
67 { 0x0098, 0xc0000000 }, in spl_init_pfc()
68 { 0x0020, 0x00000000 }, in spl_init_pfc()
69 { 0x0024, 0x00000000 }, in spl_init_pfc()
70 { 0x0028, 0x00000000 }, in spl_init_pfc()
71 { 0x002c, 0x20000000 }, in spl_init_pfc()
72 { 0x0030, 0x00001249 }, in spl_init_pfc()
73 { 0x0034, 0x00000278 }, in spl_init_pfc()
74 { 0x0038, 0x00000841 }, in spl_init_pfc()
75 { 0x003c, 0x00000000 }, in spl_init_pfc()
76 { 0x0040, 0x00000000 }, in spl_init_pfc()
77 { 0x0044, 0x10000000 }, in spl_init_pfc()
78 { 0x0048, 0x00000001 }, in spl_init_pfc()
79 { 0x004c, 0x0004aab0 }, in spl_init_pfc()
80 { 0x0050, 0x37301b00 }, in spl_init_pfc()
81 { 0x0054, 0x00048da3 }, in spl_init_pfc()
82 { 0x0058, 0x089044a1 }, in spl_init_pfc()
83 { 0x005c, 0x2a3a55b4 }, in spl_init_pfc()
84 { 0x0160, 0x00000003 }, in spl_init_pfc()
85 { 0x0004, 0xffffffff }, in spl_init_pfc()
86 { 0x0008, 0x2aef3fff }, in spl_init_pfc()
87 { 0x000c, 0x3fffffff }, in spl_init_pfc()
88 { 0x0010, 0xff7fc07f }, in spl_init_pfc()
89 { 0x0014, 0x7f3ff3f8 }, in spl_init_pfc()
90 { 0x0018, 0x1cfdfff7 }, in spl_init_pfc()
94 { 0x0100, 0x1fffffff }, in spl_init_pfc()
95 { 0x0104, 0xffff0318 }, in spl_init_pfc()
96 { 0x0108, 0x387fffe1 }, in spl_init_pfc()
97 { 0x010c, 0x00803f80 }, in spl_init_pfc()
98 { 0x0110, 0x1520009f }, in spl_init_pfc()
99 { 0x0114, 0x00000000 }, in spl_init_pfc()
100 { 0x0118, 0x00000000 }, in spl_init_pfc()
103 static const u32 pfc_base = 0xe6060000; in spl_init_pfc()
107 for (i = 0; i < ARRAY_SIZE(pfc_with_unlock); i++) { in spl_init_pfc()
113 for (i = 0; i < ARRAY_SIZE(pfc_without_unlock); i++) in spl_init_pfc()
121 0x1000, 0x3000, 0x4000, 0x5000 in spl_init_gpio()
125 { 0x4000, 0x00c00000 }, in spl_init_gpio()
126 { 0x5000, 0x63020000 }, in spl_init_gpio()
130 { 0x1000, 0x00000000 }, in spl_init_gpio()
131 { 0x3000, 0x00000000 }, in spl_init_gpio()
132 { 0x4000, 0x00c00000 }, in spl_init_gpio()
133 { 0x5000, 0xe3020000 }, in spl_init_gpio()
136 static const u32 gpio_base = 0xe6050000; in spl_init_gpio()
140 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio()
141 writel(0, gpio_base | 0x20 | gpio_offs[i]); in spl_init_gpio()
143 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio()
144 writel(0, gpio_base | 0x00 | gpio_offs[i]); in spl_init_gpio()
146 for (i = 0; i < ARRAY_SIZE(gpio_set); i++) in spl_init_gpio()
147 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); in spl_init_gpio()
149 for (i = 0; i < ARRAY_SIZE(gpio_clr); i++) in spl_init_gpio()
150 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off); in spl_init_gpio()
156 { 0x00, 0x00000020 }, in spl_init_lbsc()
157 { 0x08, 0x00002020 }, in spl_init_lbsc()
158 { 0x30, 0x02150326 }, in spl_init_lbsc()
159 { 0x38, 0x077f077f }, in spl_init_lbsc()
163 0x80, 0x84, 0x88, 0x8c, 0xa0, 0xc0, 0xc4, 0xc8, 0x180 in spl_init_lbsc()
166 static const u32 lbsc_base = 0xfec00200; in spl_init_lbsc()
170 for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) { in spl_init_lbsc()
177 for (i = 0; i < ARRAY_SIZE(lbsc_offs); i++) in spl_init_lbsc()
178 writel(0, lbsc_base | lbsc_offs[i]); in spl_init_lbsc()
184 { 0x0018, 0x21000000 }, in spl_init_dbsc()
185 { 0x0018, 0x11000000 }, in spl_init_dbsc()
186 { 0x0018, 0x10000000 }, in spl_init_dbsc()
187 { 0x0280, 0x0000a55a }, in spl_init_dbsc()
188 { 0x0290, 0x00000001 }, in spl_init_dbsc()
189 { 0x02a0, 0x80000000 }, in spl_init_dbsc()
190 { 0x0290, 0x00000004 }, in spl_init_dbsc()
194 { 0x0290, 0x00000010 }, in spl_init_dbsc()
195 { 0x02a0, 0xf004649b }, in spl_init_dbsc()
196 { 0x0290, 0x0000000f }, in spl_init_dbsc()
197 { 0x02a0, 0x00181ee4 }, in spl_init_dbsc()
198 { 0x0290, 0x00000060 }, in spl_init_dbsc()
199 { 0x02a0, 0x330657b2 }, in spl_init_dbsc()
200 { 0x0290, 0x00000001 }, in spl_init_dbsc()
201 { 0x02a0, 0x00000071 }, in spl_init_dbsc()
202 { 0x0020, 0x00000007 }, in spl_init_dbsc()
203 { 0x0024, 0x10030a02 }, in spl_init_dbsc()
204 { 0x0030, 0x00000001 }, in spl_init_dbsc()
205 { 0x00b0, 0x00000000 }, in spl_init_dbsc()
206 { 0x0040, 0x0000000b }, in spl_init_dbsc()
207 { 0x0044, 0x00000008 }, in spl_init_dbsc()
208 { 0x0048, 0x00000000 }, in spl_init_dbsc()
209 { 0x0050, 0x0000000b }, in spl_init_dbsc()
210 { 0x0054, 0x000c000b }, in spl_init_dbsc()
211 { 0x0058, 0x00000027 }, in spl_init_dbsc()
212 { 0x005c, 0x0000001c }, in spl_init_dbsc()
213 { 0x0060, 0x00000005 }, in spl_init_dbsc()
214 { 0x0064, 0x00000018 }, in spl_init_dbsc()
215 { 0x0068, 0x00000008 }, in spl_init_dbsc()
216 { 0x006c, 0x0000000c }, in spl_init_dbsc()
217 { 0x0070, 0x00000009 }, in spl_init_dbsc()
218 { 0x0074, 0x00000012 }, in spl_init_dbsc()
219 { 0x0078, 0x000000d0 }, in spl_init_dbsc()
220 { 0x007c, 0x00140005 }, in spl_init_dbsc()
221 { 0x0080, 0x00050004 }, in spl_init_dbsc()
222 { 0x0084, 0x70233005 }, in spl_init_dbsc()
223 { 0x0088, 0x000c0000 }, in spl_init_dbsc()
224 { 0x008c, 0x00000300 }, in spl_init_dbsc()
225 { 0x0090, 0x00000040 }, in spl_init_dbsc()
226 { 0x0100, 0x00000001 }, in spl_init_dbsc()
227 { 0x00c0, 0x00020001 }, in spl_init_dbsc()
228 { 0x00c8, 0x20082008 }, in spl_init_dbsc()
229 { 0x0380, 0x00020002 }, in spl_init_dbsc()
230 { 0x0390, 0x0000000f }, in spl_init_dbsc()
234 { 0x0244, 0x00000011 }, in spl_init_dbsc()
235 { 0x0290, 0x00000006 }, in spl_init_dbsc()
236 { 0x02a0, 0x0005c000 }, in spl_init_dbsc()
237 { 0x0290, 0x00000003 }, in spl_init_dbsc()
238 { 0x02a0, 0x0300c481 }, in spl_init_dbsc()
239 { 0x0290, 0x00000023 }, in spl_init_dbsc()
240 { 0x02a0, 0x00fdb6c0 }, in spl_init_dbsc()
241 { 0x0290, 0x00000011 }, in spl_init_dbsc()
242 { 0x02a0, 0x1000040b }, in spl_init_dbsc()
243 { 0x0290, 0x00000012 }, in spl_init_dbsc()
244 { 0x02a0, 0x9d5cbb66 }, in spl_init_dbsc()
245 { 0x0290, 0x00000013 }, in spl_init_dbsc()
246 { 0x02a0, 0x1a868300 }, in spl_init_dbsc()
247 { 0x0290, 0x00000014 }, in spl_init_dbsc()
248 { 0x02a0, 0x300214d8 }, in spl_init_dbsc()
249 { 0x0290, 0x00000015 }, in spl_init_dbsc()
250 { 0x02a0, 0x00000d70 }, in spl_init_dbsc()
251 { 0x0290, 0x00000016 }, in spl_init_dbsc()
252 { 0x02a0, 0x00000006 }, in spl_init_dbsc()
253 { 0x0290, 0x00000017 }, in spl_init_dbsc()
254 { 0x02a0, 0x00000018 }, in spl_init_dbsc()
255 { 0x0290, 0x0000001a }, in spl_init_dbsc()
256 { 0x02a0, 0x910035c7 }, in spl_init_dbsc()
257 { 0x0290, 0x00000004 }, in spl_init_dbsc()
261 { 0x0290, 0x00000001 }, in spl_init_dbsc()
262 { 0x02a0, 0x00000181 }, in spl_init_dbsc()
263 { 0x0018, 0x11000000 }, in spl_init_dbsc()
264 { 0x0290, 0x00000004 }, in spl_init_dbsc()
268 { 0x0290, 0x00000001 }, in spl_init_dbsc()
269 { 0x02a0, 0x0000fe01 }, in spl_init_dbsc()
270 { 0x0290, 0x00000004 }, in spl_init_dbsc()
274 { 0x0304, 0x00000000 }, in spl_init_dbsc()
275 { 0x00f4, 0x01004c20 }, in spl_init_dbsc()
276 { 0x00f8, 0x014000aa }, in spl_init_dbsc()
277 { 0x00e0, 0x00000140 }, in spl_init_dbsc()
278 { 0x00e4, 0x00081860 }, in spl_init_dbsc()
279 { 0x00e8, 0x00010000 }, in spl_init_dbsc()
280 { 0x0014, 0x00000001 }, in spl_init_dbsc()
281 { 0x0010, 0x00000001 }, in spl_init_dbsc()
282 { 0x0280, 0x00000000 }, in spl_init_dbsc()
288 for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++) in spl_init_dbsc()
291 dbsc_wait(0x2a0); in spl_init_dbsc()
293 for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++) in spl_init_dbsc()
296 dbsc_wait(0x240); in spl_init_dbsc()
298 for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++) in spl_init_dbsc()
301 dbsc_wait(0x2a0); in spl_init_dbsc()
303 for (i = 0; i < ARRAY_SIZE(dbsc_config6); i++) in spl_init_dbsc()
306 dbsc_wait(0x2a0); in spl_init_dbsc()
308 for (i = 0; i < ARRAY_SIZE(dbsc_config7); i++) in spl_init_dbsc()
311 dbsc_wait(0x2a0); in spl_init_dbsc()
313 for (i = 0; i < ARRAY_SIZE(dbsc_config8); i++) in spl_init_dbsc()
322 static const u32 qspi_base = 0xe6b10000; in spl_init_qspi()
324 writeb(0x08, qspi_base + 0x00); in spl_init_qspi()
325 writeb(0x00, qspi_base + 0x01); in spl_init_qspi()
326 writeb(0x06, qspi_base + 0x02); in spl_init_qspi()
327 writeb(0x01, qspi_base + 0x0a); in spl_init_qspi()
328 writeb(0x00, qspi_base + 0x0b); in spl_init_qspi()
329 writeb(0x00, qspi_base + 0x0c); in spl_init_qspi()
330 writeb(0x00, qspi_base + 0x0d); in spl_init_qspi()
331 writeb(0x00, qspi_base + 0x0e); in spl_init_qspi()
333 writew(0xe080, qspi_base + 0x10); in spl_init_qspi()
335 writeb(0xc0, qspi_base + 0x18); in spl_init_qspi()
336 writeb(0x00, qspi_base + 0x18); in spl_init_qspi()
337 writeb(0x00, qspi_base + 0x08); in spl_init_qspi()
338 writeb(0x48, qspi_base + 0x00); in spl_init_qspi()
368 const u32 jtag_magic = 0x1337c0de; in board_boot_order()
369 const u32 load_magic = 0xb33fc0de; in board_boot_order()
372 * If JTAG probe sets special word at 0xe6300020, then it must in board_boot_order()
375 if (readl(CONFIG_SPL_TEXT_BASE + 0x20) == jtag_magic) { in board_boot_order()
378 while (readl(CONFIG_SPL_TEXT_BASE + 0x24) != load_magic) in board_boot_order()
381 spl_boot_list[0] = BOOT_DEVICE_RAM; in board_boot_order()
388 spl_boot_list[0] = BOOT_DEVICE_SPI; in board_boot_order()