Lines Matching +full:0 +full:x7c00

13 #define PRPRICR5	0xFF800048 /* LMB */
14 #define PRPRICR5_D	0x2a
17 #define FPGA_NAND_CTL	0xB410020C
18 #define FPGA_NAND_RST	0x0008
19 #define FPGA_NAND_INIT	0x0000
23 #define PACR_D	0x0000
24 #define PBCR_D	0x0000
25 #define PCCR_D	0x1000
26 #define PDCR_D	0x0000
27 #define PECR_D	0x0410
28 #define PFCR_D	0xffff
29 #define PGCR_D	0x0000
30 #define PHCR_D	0x5011
31 #define PJCR_D	0x4400
32 #define PKCR_D	0x7c00
33 #define PLCR_D	0x0000
34 #define PMCR_D	0x0000
35 #define PNCR_D	0x0000
36 #define PQCR_D	0x0000
37 #define PRCR_D	0x0000
38 #define PSCR_D	0x0000
39 #define PTCR_D	0x0010
40 #define PUCR_D	0x0fff
41 #define PVCR_D	0xffff
42 #define PWCR_D	0x0000
43 #define PXCR_D	0x7500
44 #define PYCR_D	0x0000
45 #define PZCR_D	0x5540
48 #define PSELA_D	0x1410
49 #define PSELB_D	0x0140
50 #define PSELC_D	0x0000
51 #define PSELD_D	0x0400
54 #define	HIZCRA_D	0x0000
55 #define HIZCRB_D	0x1000
56 #define HIZCRC_D	0x0000
57 #define HIZCRD_D	0x0000
60 #define MSELCRA_D	0x0014
61 #define MSELCRB_D	0x0018
64 #define MSTPCR2_D	0xFFD9F280
72 	return 0;  in checkboard()
127 	return 0;  in board_init()
143 	int rc = 0;  in board_eth_init()
145 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);  in board_eth_init()