Lines Matching full:dis
37 MUX_VAL(CONTROL_PADCONF_CAM_D1, (IEN | DIS | SB_HIZ | M4)) \
38 MUX_VAL(CONTROL_PADCONF_CAM_D2, (IEN | DIS | SB_HIZ | M7)) \
44 MUX_VAL(CONTROL_PADCONF_CAM_D8, (IEN | DIS | SB_HIZ | M7)) \
45 MUX_VAL(CONTROL_PADCONF_CAM_D9, (IEN | DIS | SB_HIZ | M4)) \
48 MUX_VAL(CONTROL_PADCONF_CAM_FLD, (IEN | DIS | SB_HIZ | M4)) \
55 MUX_VAL(CONTROL_PADCONF_CAM_XCLKB, (IEN | DIS | SB_HIZ | SB_PD | M7)) \
113 MUX_VAL(CONTROL_PADCONF_GPMC_CLK, (IEN | DIS | M7)) \
130 MUX_VAL(CONTROL_PADCONF_GPMC_NADV_ALE, (IDIS | DIS | M0)) \
131 MUX_VAL(CONTROL_PADCONF_GPMC_NBE0_CLE, (IDIS | DIS | M0)) \
133 MUX_VAL(CONTROL_PADCONF_GPMC_NCS0, (IDIS | DIS | SB_HIZ | SB_PD | M0)) \
134 MUX_VAL(CONTROL_PADCONF_GPMC_NCS1, (IEN | DIS | M7)) \
137 MUX_VAL(CONTROL_PADCONF_GPMC_NCS4, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
138 MUX_VAL(CONTROL_PADCONF_GPMC_NCS5, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
139 MUX_VAL(CONTROL_PADCONF_GPMC_NCS6, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
140 MUX_VAL(CONTROL_PADCONF_GPMC_NCS7, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
141 MUX_VAL(CONTROL_PADCONF_GPMC_NOE, (IDIS | DIS | M0)) \
142 MUX_VAL(CONTROL_PADCONF_GPMC_NWE, (IDIS | DIS | M0)) \
143 MUX_VAL(CONTROL_PADCONF_GPMC_NWP, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
144 MUX_VAL(CONTROL_PADCONF_GPMC_WAIT0, (IEN | DIS | SB_HIZ | M0)) \
148 MUX_VAL(CONTROL_PADCONF_HDQ_SIO, (IEN | DIS | SB_HIZ | M4)) \
172 MUX_VAL(CONTROL_PADCONF_JTAG_RTCK, (IDIS | DIS | M0)) \
175 MUX_VAL(CONTROL_PADCONF_JTAG_TDO, (IDIS | DIS | M0)) \
179 MUX_VAL(CONTROL_PADCONF_MCBSP1_CLKX, (IEN | DIS | SB_HIZ | M4)) \
180 MUX_VAL(CONTROL_PADCONF_MCBSP1_DR, (IEN | DIS | SB_HIZ | M4)) \
181 MUX_VAL(CONTROL_PADCONF_MCBSP1_DX, (IEN | DIS | SB_HIZ | SB_PD | M7)) \
183 MUX_VAL(CONTROL_PADCONF_MCBSP1_FSX, (IEN | DIS | SB_HIZ | M4)) \
188 MUX_VAL(CONTROL_PADCONF_MCBSP3_CLKX, (IDIS | DIS | SB_HIZ | SB_PU | M1)) \
220 MUX_VAL(CONTROL_PADCONF_MMC2_DAT4, (IDIS | DIS | SB_HIZ | M0)) \
221 MUX_VAL(CONTROL_PADCONF_MMC2_DAT5, (IDIS | DIS | SB_HIZ | M0)) \
222 MUX_VAL(CONTROL_PADCONF_MMC2_DAT6, (IDIS | DIS | SB_HIZ | M0)) \
224 MUX_VAL(CONTROL_PADCONF_SDRC_A0, (IDIS | DIS | M0)) \
225 MUX_VAL(CONTROL_PADCONF_SDRC_A1, (IDIS | DIS | M0)) \
226 MUX_VAL(CONTROL_PADCONF_SDRC_A2, (IDIS | DIS | M0)) \
227 MUX_VAL(CONTROL_PADCONF_SDRC_A3, (IDIS | DIS | M0)) \
228 MUX_VAL(CONTROL_PADCONF_SDRC_A4, (IDIS | DIS | M0)) \
229 MUX_VAL(CONTROL_PADCONF_SDRC_A5, (IDIS | DIS | M0)) \
230 MUX_VAL(CONTROL_PADCONF_SDRC_A6, (IDIS | DIS | M0)) \
231 MUX_VAL(CONTROL_PADCONF_SDRC_A7, (IDIS | DIS | M0)) \
232 MUX_VAL(CONTROL_PADCONF_SDRC_A8, (IDIS | DIS | M0)) \
233 MUX_VAL(CONTROL_PADCONF_SDRC_A9, (IDIS | DIS | M0)) \
234 MUX_VAL(CONTROL_PADCONF_SDRC_A10, (IDIS | DIS | M0)) \
235 MUX_VAL(CONTROL_PADCONF_SDRC_A11, (IDIS | DIS | M0)) \
236 MUX_VAL(CONTROL_PADCONF_SDRC_A12, (IDIS | DIS | M0)) \
237 MUX_VAL(CONTROL_PADCONF_SDRC_A13, (IDIS | DIS | M0)) \
238 MUX_VAL(CONTROL_PADCONF_SDRC_A14, (IDIS | DIS | M0)) \
239 MUX_VAL(CONTROL_PADCONF_SDRC_BA0, (IDIS | DIS | M0)) \
240 MUX_VAL(CONTROL_PADCONF_SDRC_BA1, (IDIS | DIS | M0)) \
241 MUX_VAL(CONTROL_PADCONF_SDRC_CKE0, (IDIS | DIS | M0)) \
242 MUX_VAL(CONTROL_PADCONF_SDRC_CKE1, (IDIS | DIS | M7)) \
243 MUX_VAL(CONTROL_PADCONF_SDRC_CLK, (IEN | DIS | M0)) \
244 MUX_VAL(CONTROL_PADCONF_SDRC_D0, (IEN | DIS | M0)) \
245 MUX_VAL(CONTROL_PADCONF_SDRC_D1, (IEN | DIS | M0)) \
246 MUX_VAL(CONTROL_PADCONF_SDRC_D2, (IEN | DIS | M0)) \
247 MUX_VAL(CONTROL_PADCONF_SDRC_D3, (IEN | DIS | M0)) \
248 MUX_VAL(CONTROL_PADCONF_SDRC_D4, (IEN | DIS | M0)) \
249 MUX_VAL(CONTROL_PADCONF_SDRC_D5, (IEN | DIS | M0)) \
250 MUX_VAL(CONTROL_PADCONF_SDRC_D6, (IEN | DIS | M0)) \
251 MUX_VAL(CONTROL_PADCONF_SDRC_D7, (IEN | DIS | M0)) \
252 MUX_VAL(CONTROL_PADCONF_SDRC_D8, (IEN | DIS | M0)) \
253 MUX_VAL(CONTROL_PADCONF_SDRC_D9, (IEN | DIS | M0)) \
254 MUX_VAL(CONTROL_PADCONF_SDRC_D10, (IEN | DIS | M0)) \
255 MUX_VAL(CONTROL_PADCONF_SDRC_D11, (IEN | DIS | M0)) \
256 MUX_VAL(CONTROL_PADCONF_SDRC_D12, (IEN | DIS | M0)) \
257 MUX_VAL(CONTROL_PADCONF_SDRC_D13, (IEN | DIS | M0)) \
258 MUX_VAL(CONTROL_PADCONF_SDRC_D14, (IEN | DIS | M0)) \
259 MUX_VAL(CONTROL_PADCONF_SDRC_D15, (IEN | DIS | M0)) \
260 MUX_VAL(CONTROL_PADCONF_SDRC_D16, (IEN | DIS | M0)) \
261 MUX_VAL(CONTROL_PADCONF_SDRC_D17, (IEN | DIS | M0)) \
262 MUX_VAL(CONTROL_PADCONF_SDRC_D18, (IEN | DIS | M0)) \
263 MUX_VAL(CONTROL_PADCONF_SDRC_D19, (IEN | DIS | M0)) \
264 MUX_VAL(CONTROL_PADCONF_SDRC_D20, (IEN | DIS | M0)) \
265 MUX_VAL(CONTROL_PADCONF_SDRC_D21, (IEN | DIS | M0)) \
266 MUX_VAL(CONTROL_PADCONF_SDRC_D22, (IEN | DIS | M0)) \
267 MUX_VAL(CONTROL_PADCONF_SDRC_D23, (IEN | DIS | M0)) \
268 MUX_VAL(CONTROL_PADCONF_SDRC_D24, (IEN | DIS | M0)) \
269 MUX_VAL(CONTROL_PADCONF_SDRC_D25, (IEN | DIS | M0)) \
270 MUX_VAL(CONTROL_PADCONF_SDRC_D26, (IEN | DIS | M0)) \
271 MUX_VAL(CONTROL_PADCONF_SDRC_D27, (IEN | DIS | M0)) \
272 MUX_VAL(CONTROL_PADCONF_SDRC_D28, (IEN | DIS | M0)) \
273 MUX_VAL(CONTROL_PADCONF_SDRC_D29, (IEN | DIS | M0)) \
274 MUX_VAL(CONTROL_PADCONF_SDRC_D30, (IEN | DIS | M0)) \
275 MUX_VAL(CONTROL_PADCONF_SDRC_D31, (IEN | DIS | M0)) \
276 MUX_VAL(CONTROL_PADCONF_SDRC_DM0, (IDIS | DIS | M0)) \
277 MUX_VAL(CONTROL_PADCONF_SDRC_DM1, (IDIS | DIS | M0)) \
278 MUX_VAL(CONTROL_PADCONF_SDRC_DM2, (IDIS | DIS | M0)) \
279 MUX_VAL(CONTROL_PADCONF_SDRC_DM3, (IDIS | DIS | M0)) \
280 MUX_VAL(CONTROL_PADCONF_SDRC_DQS0, (IEN | DIS | M0)) \
281 MUX_VAL(CONTROL_PADCONF_SDRC_DQS1, (IEN | DIS | M0)) \
282 MUX_VAL(CONTROL_PADCONF_SDRC_DQS2, (IEN | DIS | M0)) \
283 MUX_VAL(CONTROL_PADCONF_SDRC_DQS3, (IEN | DIS | M0)) \
284 MUX_VAL(CONTROL_PADCONF_SDRC_NCAS, (IDIS | DIS | M0)) \
285 MUX_VAL(CONTROL_PADCONF_SDRC_NCLK, (IDIS | DIS | M0)) \
286 MUX_VAL(CONTROL_PADCONF_SDRC_NCS0, (IDIS | DIS | M0)) \
287 MUX_VAL(CONTROL_PADCONF_SDRC_NCS1, (IDIS | DIS | M0)) \
288 MUX_VAL(CONTROL_PADCONF_SDRC_NRAS, (IDIS | DIS | M0)) \
289 MUX_VAL(CONTROL_PADCONF_SDRC_NWE, (IDIS | DIS | M0)) \
290 MUX_VAL(CONTROL_PADCONF_SYS_32K, (IEN | DIS | M0)) \
291 MUX_VAL(CONTROL_PADCONF_SYS_BOOT0, (IEN | DIS | M0)) \
292 MUX_VAL(CONTROL_PADCONF_SYS_BOOT1, (IEN | DIS | M0)) \
293 MUX_VAL(CONTROL_PADCONF_SYS_BOOT2, (IEN | DIS | M0)) \
294 MUX_VAL(CONTROL_PADCONF_SYS_BOOT3, (IEN | DIS | M0)) \
295 MUX_VAL(CONTROL_PADCONF_SYS_BOOT4, (IEN | DIS | M0)) \
296 MUX_VAL(CONTROL_PADCONF_SYS_BOOT5, (IEN | DIS | M0)) \
297 MUX_VAL(CONTROL_PADCONF_SYS_BOOT6, (IEN | DIS | M0)) \
300 MUX_VAL(CONTROL_PADCONF_SYS_CLKREQ, (IEN | DIS | M0)) \
305 MUX_VAL(CONTROL_PADCONF_UART1_RTS, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
307 MUX_VAL(CONTROL_PADCONF_UART1_TX, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
314 MUX_VAL(CONTROL_PADCONF_UART3_RTS_SD, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
316 MUX_VAL(CONTROL_PADCONF_UART3_TX_IRTX, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \