nvidia/venice2/as3722_init.c

1 // SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch-tegra/tegra_i2c.h>
12 /* AS3722-PMIC-specific early init code - get CPU rails up, etc */
18 	writel(addr, &reg->cmd_addr0);  in tegra_i2c_ll_write_addr()
19 	writel(config, &reg->cnfg);  in tegra_i2c_ll_write_addr()
26 	writel(data, &reg->cmd_data1);  in tegra_i2c_ll_write_data()
27 	writel(config, &reg->cnfg);  in tegra_i2c_ll_write_data()
41 	 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.  in pmic_enable_cpu_vdd()
50 	 * First set VDD to 1.0V, then enable the VDD regulator.  in pmic_enable_cpu_vdd()
55 	 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.  in pmic_enable_cpu_vdd()
63 	 * First set VDD to 1.0V, then enable the VDD regulator.  in pmic_enable_cpu_vdd()
68 	 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.  in pmic_enable_cpu_vdd()
76 	 * First set VDD to 1.2V, then enable the VDD regulator.  in pmic_enable_cpu_vdd()
81 	 * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.  in pmic_enable_cpu_vdd()
91 	 * NOTE: We do this early because doing it later seems to hose the CPU  in pmic_enable_cpu_vdd()
97 	 * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.  in pmic_enable_cpu_vdd()