Lines Matching refs:top_set_pin
99 int top_set_pin(int pin, int func) in top_set_pin() function
122 int top_set_pin(int pin, int func) in top_set_pin() function
142 top_set_pin(34, 01); /* EBI_CS0 */ in vct_pin_mux_initialize()
143 top_set_pin(33, 01); /* EBI_CS1 */ in vct_pin_mux_initialize()
144 top_set_pin(32, 01); /* EBI_CS2 */ in vct_pin_mux_initialize()
145 top_set_pin(100, 02); /* EBI_CS3 */ in vct_pin_mux_initialize()
146 top_set_pin(101, 02); /* EBI_CS4 */ in vct_pin_mux_initialize()
147 top_set_pin(102, 02); /* EBI_CS5 */ in vct_pin_mux_initialize()
148 top_set_pin(103, 02); /* EBI_CS6 */ in vct_pin_mux_initialize()
149 top_set_pin(104, 02); /* EBI_CS7 top_set_pin(104,03); EBI_GENIO3 */ in vct_pin_mux_initialize()
150 top_set_pin(35, 01); /* EBI_ALE */ in vct_pin_mux_initialize()
151 top_set_pin(36, 01); /* EBI_ADDR15 */ in vct_pin_mux_initialize()
152 top_set_pin(37, 01); /* EBI_ADDR14 top_set_pin(78,03); EBI_ADDR14 */ in vct_pin_mux_initialize()
153 top_set_pin(38, 01); /* EBI_ADDR13 */ in vct_pin_mux_initialize()
154 top_set_pin(39, 01); /* EBI_ADDR12 */ in vct_pin_mux_initialize()
155 top_set_pin(40, 01); /* EBI_ADDR11 */ in vct_pin_mux_initialize()
156 top_set_pin(41, 01); /* EBI_ADDR10 */ in vct_pin_mux_initialize()
157 top_set_pin(42, 01); /* EBI_ADDR9 */ in vct_pin_mux_initialize()
158 top_set_pin(43, 01); /* EBI_ADDR8 */ in vct_pin_mux_initialize()
159 top_set_pin(44, 01); /* EBI_ADDR7 */ in vct_pin_mux_initialize()
160 top_set_pin(45, 01); /* EBI_ADDR6 */ in vct_pin_mux_initialize()
161 top_set_pin(46, 01); /* EBI_ADDR5 */ in vct_pin_mux_initialize()
162 top_set_pin(47, 01); /* EBI_ADDR4 */ in vct_pin_mux_initialize()
163 top_set_pin(48, 01); /* EBI_ADDR3 */ in vct_pin_mux_initialize()
164 top_set_pin(49, 01); /* EBI_ADDR2 */ in vct_pin_mux_initialize()
165 top_set_pin(50, 01); /* EBI_ADDR1 */ in vct_pin_mux_initialize()
166 top_set_pin(51, 01); /* EBI_ADDR0 */ in vct_pin_mux_initialize()
167 top_set_pin(52, 01); /* EBI_DIR */ in vct_pin_mux_initialize()
168 top_set_pin(53, 01); /* EBI_DAT15 top_set_pin(81,01); EBI_DAT15 */ in vct_pin_mux_initialize()
169 top_set_pin(54, 01); /* EBI_DAT14 top_set_pin(82,01); EBI_DAT14 */ in vct_pin_mux_initialize()
170 top_set_pin(55, 01); /* EBI_DAT13 top_set_pin(83,01); EBI_DAT13 */ in vct_pin_mux_initialize()
171 top_set_pin(56, 01); /* EBI_DAT12 top_set_pin(84,01); EBI_DAT12 */ in vct_pin_mux_initialize()
172 top_set_pin(57, 01); /* EBI_DAT11 top_set_pin(85,01); EBI_DAT11 */ in vct_pin_mux_initialize()
173 top_set_pin(58, 01); /* EBI_DAT10 top_set_pin(86,01); EBI_DAT10 */ in vct_pin_mux_initialize()
174 top_set_pin(59, 01); /* EBI_DAT9 top_set_pin(87,01); EBI_DAT9 */ in vct_pin_mux_initialize()
175 top_set_pin(60, 01); /* EBI_DAT8 top_set_pin(88,01); EBI_DAT8 */ in vct_pin_mux_initialize()
176 top_set_pin(61, 01); /* EBI_DAT7 */ in vct_pin_mux_initialize()
177 top_set_pin(62, 01); /* EBI_DAT6 */ in vct_pin_mux_initialize()
178 top_set_pin(63, 01); /* EBI_DAT5 */ in vct_pin_mux_initialize()
179 top_set_pin(64, 01); /* EBI_DAT4 */ in vct_pin_mux_initialize()
180 top_set_pin(65, 01); /* EBI_DAT3 */ in vct_pin_mux_initialize()
181 top_set_pin(66, 01); /* EBI_DAT2 */ in vct_pin_mux_initialize()
182 top_set_pin(67, 01); /* EBI_DAT1 */ in vct_pin_mux_initialize()
183 top_set_pin(68, 01); /* EBI_DAT0 */ in vct_pin_mux_initialize()
184 top_set_pin(69, 01); /* EBI_IORD */ in vct_pin_mux_initialize()
185 top_set_pin(70, 01); /* EBI_IOWR */ in vct_pin_mux_initialize()
186 top_set_pin(71, 01); /* EBI_WE */ in vct_pin_mux_initialize()
187 top_set_pin(72, 01); /* EBI_OE */ in vct_pin_mux_initialize()
188 top_set_pin(73, 01); /* EBI_IORDY */ in vct_pin_mux_initialize()
189 top_set_pin(95, 02); /* EBI_EBI_DMACK*/ in vct_pin_mux_initialize()
190 top_set_pin(112, 02); /* EBI_IRQ0 */ in vct_pin_mux_initialize()
191 top_set_pin(111, 02); /* EBI_IRQ1 top_set_pin(111,03); EBI_DMARQ */ in vct_pin_mux_initialize()
192 top_set_pin(107, 02); /* EBI_IRQ2 */ in vct_pin_mux_initialize()
193 top_set_pin(108, 02); /* EBI_IRQ3 */ in vct_pin_mux_initialize()
194 top_set_pin(30, 01); /* EBI_GENIO1 top_set_pin(99,03); EBI_GENIO1 */ in vct_pin_mux_initialize()
195 top_set_pin(31, 01); /* EBI_GENIO2 top_set_pin(98,03); EBI_GENIO2 */ in vct_pin_mux_initialize()
196 top_set_pin(105, 02); /* EBI_GENIO3 top_set_pin(104,03); EBI_GENIO3 */ in vct_pin_mux_initialize()
197 top_set_pin(106, 02); /* EBI_GENIO4 top_set_pin(144,02); EBI_GENIO4 */ in vct_pin_mux_initialize()
198 top_set_pin(109, 02); /* EBI_GENIO5 top_set_pin(142,02); EBI_GENIO5 */ in vct_pin_mux_initialize()
199 top_set_pin(110, 02); /* EBI_BURST_CLK */ in vct_pin_mux_initialize()
203 top_set_pin(19, 01); /* EBI_CS0 */ in vct_pin_mux_initialize()
204 top_set_pin(18, 01); /* EBI_CS1 */ in vct_pin_mux_initialize()
205 top_set_pin(17, 01); /* EBI_CS2 */ in vct_pin_mux_initialize()
206 top_set_pin(92, 02); /* EBI_CS3 */ in vct_pin_mux_initialize()
207 top_set_pin(93, 02); /* EBI_CS4 */ in vct_pin_mux_initialize()
208 top_set_pin(95, 02); /* EBI_CS6 */ in vct_pin_mux_initialize()
209 top_set_pin(96, 02); /* EBI_CS7 top_set_pin(104,03); EBI_GENIO3 */ in vct_pin_mux_initialize()
210 top_set_pin(20, 01); /* EBI_ALE */ in vct_pin_mux_initialize()
211 top_set_pin(21, 01); /* EBI_ADDR15 */ in vct_pin_mux_initialize()
212 top_set_pin(22, 01); /* EBI_ADDR14 top_set_pin(78,03); EBI_ADDR14 */ in vct_pin_mux_initialize()
213 top_set_pin(23, 01); /* EBI_ADDR13 */ in vct_pin_mux_initialize()
214 top_set_pin(24, 01); /* EBI_ADDR12 */ in vct_pin_mux_initialize()
215 top_set_pin(25, 01); /* EBI_ADDR11 */ in vct_pin_mux_initialize()
216 top_set_pin(26, 01); /* EBI_ADDR10 */ in vct_pin_mux_initialize()
217 top_set_pin(27, 01); /* EBI_ADDR9 */ in vct_pin_mux_initialize()
218 top_set_pin(28, 01); /* EBI_ADDR8 */ in vct_pin_mux_initialize()
219 top_set_pin(29, 01); /* EBI_ADDR7 */ in vct_pin_mux_initialize()
220 top_set_pin(30, 01); /* EBI_ADDR6 */ in vct_pin_mux_initialize()
221 top_set_pin(31, 01); /* EBI_ADDR5 */ in vct_pin_mux_initialize()
222 top_set_pin(32, 01); /* EBI_ADDR4 */ in vct_pin_mux_initialize()
223 top_set_pin(33, 01); /* EBI_ADDR3 */ in vct_pin_mux_initialize()
224 top_set_pin(34, 01); /* EBI_ADDR2 */ in vct_pin_mux_initialize()
225 top_set_pin(35, 01); /* EBI_ADDR1 */ in vct_pin_mux_initialize()
226 top_set_pin(36, 01); /* EBI_ADDR0 */ in vct_pin_mux_initialize()
227 top_set_pin(37, 01); /* EBI_DIR */ in vct_pin_mux_initialize()
228 top_set_pin(38, 01); /* EBI_DAT15 top_set_pin(81,01); EBI_DAT15 */ in vct_pin_mux_initialize()
229 top_set_pin(39, 01); /* EBI_DAT14 top_set_pin(82,01); EBI_DAT14 */ in vct_pin_mux_initialize()
230 top_set_pin(40, 01); /* EBI_DAT13 top_set_pin(83,01); EBI_DAT13 */ in vct_pin_mux_initialize()
231 top_set_pin(41, 01); /* EBI_DAT12 top_set_pin(84,01); EBI_DAT12 */ in vct_pin_mux_initialize()
232 top_set_pin(42, 01); /* EBI_DAT11 top_set_pin(85,01); EBI_DAT11 */ in vct_pin_mux_initialize()
233 top_set_pin(43, 01); /* EBI_DAT10 top_set_pin(86,01); EBI_DAT10 */ in vct_pin_mux_initialize()
234 top_set_pin(44, 01); /* EBI_DAT9 top_set_pin(87,01); EBI_DAT9 */ in vct_pin_mux_initialize()
235 top_set_pin(45, 01); /* EBI_DAT8 top_set_pin(88,01); EBI_DAT8 */ in vct_pin_mux_initialize()
236 top_set_pin(46, 01); /* EBI_DAT7 */ in vct_pin_mux_initialize()
237 top_set_pin(47, 01); /* EBI_DAT6 */ in vct_pin_mux_initialize()
238 top_set_pin(48, 01); /* EBI_DAT5 */ in vct_pin_mux_initialize()
239 top_set_pin(49, 01); /* EBI_DAT4 */ in vct_pin_mux_initialize()
240 top_set_pin(50, 01); /* EBI_DAT3 */ in vct_pin_mux_initialize()
241 top_set_pin(51, 01); /* EBI_DAT2 */ in vct_pin_mux_initialize()
242 top_set_pin(52, 01); /* EBI_DAT1 */ in vct_pin_mux_initialize()
243 top_set_pin(53, 01); /* EBI_DAT0 */ in vct_pin_mux_initialize()
244 top_set_pin(54, 01); /* EBI_IORD */ in vct_pin_mux_initialize()
245 top_set_pin(55, 01); /* EBI_IOWR */ in vct_pin_mux_initialize()
246 top_set_pin(56, 01); /* EBI_WE */ in vct_pin_mux_initialize()
247 top_set_pin(57, 01); /* EBI_OE */ in vct_pin_mux_initialize()
248 top_set_pin(58, 01); /* EBI_IORDY */ in vct_pin_mux_initialize()
249 top_set_pin(87, 02); /* EBI_EBI_DMACK*/ in vct_pin_mux_initialize()
250 top_set_pin(106, 02); /* EBI_IRQ0 */ in vct_pin_mux_initialize()
251 top_set_pin(105, 02); /* EBI_IRQ1 top_set_pin(111,03); EBI_DMARQ */ in vct_pin_mux_initialize()
252 top_set_pin(101, 02); /* EBI_IRQ2 */ in vct_pin_mux_initialize()
253 top_set_pin(102, 02); /* EBI_IRQ3 */ in vct_pin_mux_initialize()
254 top_set_pin(15, 01); /* EBI_GENIO1 top_set_pin(99,03); EBI_GENIO1 */ in vct_pin_mux_initialize()
255 top_set_pin(16, 01); /* EBI_GENIO2 top_set_pin(98,03); EBI_GENIO2 */ in vct_pin_mux_initialize()
256 top_set_pin(99, 02); /* EBI_GENIO3 top_set_pin(104,03); EBI_GENIO3 */ in vct_pin_mux_initialize()
257 top_set_pin(100, 02); /* EBI_GENIO4 top_set_pin(144,02); EBI_GENIO4 */ in vct_pin_mux_initialize()
258 top_set_pin(103, 02); /* EBI_GENIO5 top_set_pin(142,02); EBI_GENIO5 */ in vct_pin_mux_initialize()
259 top_set_pin(104, 02); /* EBI_BURST_CLK */ in vct_pin_mux_initialize()
263 top_set_pin(0, 2); /* SCL2 on GPIO 11 */ in vct_pin_mux_initialize()
264 top_set_pin(1, 2); /* SDA2 on GPIO 10 */ in vct_pin_mux_initialize()
268 top_set_pin(141, 1); in vct_pin_mux_initialize()
269 top_set_pin(143, 1); in vct_pin_mux_initialize()
272 top_set_pin(107, 1); in vct_pin_mux_initialize()
273 top_set_pin(109, 1); in vct_pin_mux_initialize()