45 #define E2P_CMD			(SMSC9118_BASE + 0xB0)  macro
141 	if ((temp = smc911x_reg_read(E2P_CMD)) & E2P_CMD_EPC_BUSY_) {  in eeprom_read_location()
146 	smc911x_reg_write(E2P_CMD,  in eeprom_read_location()
150 	while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {  in eeprom_read_location()
169 	if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {  in eeprom_enable_erase_and_write()
173 	smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_));  in eeprom_enable_erase_and_write()
175 	while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {  in eeprom_enable_erase_and_write()
192 	if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {  in eeprom_disable_erase_and_write()
196 	smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWDS_));  in eeprom_disable_erase_and_write()
198 	while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {  in eeprom_disable_erase_and_write()
217 	if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {  in eeprom_write_location()
223 	smc911x_reg_write(E2P_CMD,  in eeprom_write_location()
227 	while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {  in eeprom_write_location()
244 	if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {  in eeprom_erase_all()
249 	smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_ERAL_));  in eeprom_erase_all()
251 	while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {  in eeprom_erase_all()
268 	if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {  in eeprom_reload()
272 	smc911x_reg_write(E2P_CMD,  in eeprom_reload()
275 	while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) {  in eeprom_reload()