Lines Matching +full:qemu +full:- +full:setup
1 /* SPDX-License-Identifier: GPL-2.0 */
56 * 'MIPS: qemu-malta: add YAMON-style GT64120 memory map'
58 * http://www.mail-archive.com/barebox@lists.infradead.org/msg06128.html
60 * based on write_bootloader() in qemu.git/hw/mips_malta.c
61 * see GT64120 manual and qemu.git/hw/gt64xxx.c for details
69 /* setup MEM-to-PCI0 mapping */
72 /* setup PCI0 io window to 0x18000000-0x181fffff */
78 /* setup PCI0 mem windows */
96 /* setup peripheral bus controller clock divide */
118 /* setup basic address decode */
121 li t2, -CONFIG_SYS_MEM_SIZE
127 /* initialise IP1 - unused */
129 li t2, -MALTA_MSC01_IP1_SIZE
135 /* initialise IP2 - PCI */
137 li t2, -MALTA_MSC01_IP2_SIZE1
141 li t2, -MALTA_MSC01_IP2_SIZE2
145 /* initialise IP3 - peripheral bus controller */
147 li t2, -MALTA_MSC01_IP3_SIZE
153 /* setup PCI memory */
156 li t2, (-MALTA_MSC01_PCIMEM_SIZE) & MSC01_PCI_SC2PMMSKL_MSK_MSK
162 /* setup PCI I/O */
164 li t2, (-MALTA_MSC01_PCIIO_SIZE) & MSC01_PCI_SC2PIOMSKL_MSK_MSK
170 /* setup PCI_BAR0 memory window */
171 li t1, -CONFIG_SYS_MEM_SIZE
174 /* setup PCI to SysCon/CPU translation */
178 /* setup PCI vendor & device IDs */
183 /* setup PCI subsystem vendor & device IDs */
186 /* setup PCI class, revision */
191 /* ensure a sane setup */
205 /* setup PCI command register */
213 /* setup PCI byte swapping */