Lines Matching +full:otp +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0+
59 writel(0x00000003, gpio_regs + GPIO_PXINTC(1)); in ci20_mux_eth()
60 writel(0x00000003, gpio_regs + GPIO_PXMASKC(1)); in ci20_mux_eth()
61 writel(0x00000003, gpio_regs + GPIO_PXPAT1C(1)); in ci20_mux_eth()
62 writel(0x00000003, gpio_regs + GPIO_PXPAT0C(1)); in ci20_mux_eth()
63 writel(0x00000003, gpio_regs + GPIO_PXPENS(1)); in ci20_mux_eth()
90 writel(0x00000003, gpio_regs + GPIO_PXINTC(1)); in ci20_mux_nand()
91 writel(0x00000003, gpio_regs + GPIO_PXMASKC(1)); in ci20_mux_nand()
92 writel(0x00000003, gpio_regs + GPIO_PXPAT1C(1)); in ci20_mux_nand()
93 writel(0x00000003, gpio_regs + GPIO_PXPAT0C(1)); in ci20_mux_nand()
94 writel(0x00000003, gpio_regs + GPIO_PXPENS(1)); in ci20_mux_nand()
101 jz47xx_gpio_direction_output(JZ_GPIO(5, 22), 1); in ci20_mux_nand()
116 /* UART 1 and 2 */ in ci20_mux_uart()
117 jz4780_clk_ungate_uart(1); in ci20_mux_uart()
122 writel(1 << 12, gpio_regs + GPIO_PXINTC(3)); in ci20_mux_uart()
123 writel(1 << 12, gpio_regs + GPIO_PXMASKS(3)); in ci20_mux_uart()
124 writel(1 << 12, gpio_regs + GPIO_PXPAT1S(3)); in ci20_mux_uart()
125 writel(1 << 12, gpio_regs + GPIO_PXPAT0C(3)); in ci20_mux_uart()
129 writel(1 << 30, gpio_regs + GPIO_PXPAT0C(0)); in ci20_mux_uart()
130 writel(1 << 31, gpio_regs + GPIO_PXPAT0S(0)); in ci20_mux_uart()
157 jz47xx_gpio_direction_output(JZ_GPIO(2, 1), 0); in board_early_init_f()
167 struct ci20_otp otp; in misc_init_r() local
170 /* Read the board OTP data */ in misc_init_r()
172 jz4780_efuse_read(0x18, 16, (u8 *)&otp); in misc_init_r()
175 if (!is_valid_ethaddr(otp.mac)) { in misc_init_r()
177 jz4780_efuse_read(0x8, 4, &otp.mac[0]); in misc_init_r()
178 jz4780_efuse_read(0x12, 2, &otp.mac[4]); in misc_init_r()
179 otp.mac[0] = (otp.mac[0] | 0x02) & ~0x01; in misc_init_r()
181 eth_env_set_enetaddr("ethaddr", otp.mac); in misc_init_r()
184 env_set_ulong("serial#", otp.serial_number); in misc_init_r()
185 env_set_ulong("board_date", otp.date); in misc_init_r()
186 manufacturer[0] = otp.manufacturer[0]; in misc_init_r()
187 manufacturer[1] = otp.manufacturer[1]; in misc_init_r()
201 jz47xx_gpio_direction_output(JZ_GPIO(1, 25), 1); in board_eth_init()
207 jz47xx_gpio_direction_output(JZ_GPIO(5, 12), 1); in board_eth_init()
228 ((!!jz47xx_gpio_get_value(JZ_GPIO(2, 19))) << 1); in ci20_revision()
230 if (val == 3) /* Rev 1 boards had no pulldowns - giving 3 */ in ci20_revision()
231 return 1; in ci20_revision()
232 if (val == 1) /* Rev 2 boards pulldown port C bit 18 giving 1 */ in ci20_revision()
240 gd->ram_size = sdram_size(0) + sdram_size(1); in dram_init()
244 /* U-Boot common routines */
273 (31 << DDRC_TIMING4_TRFC_BIT) | (1 << DDRC_TIMING4_TRWCOV_BIT) |
317 (42 << DDRC_TIMING4_TRFC_BIT) | (1 << DDRC_TIMING4_TRWCOV_BIT) |