Lines Matching refs:fpga_mii
424 struct fpga_mii { struct
427 } fpga_mii[] = { argument
441 struct fpga_mii *fpga_mii = bus->priv; in mii_mdio_active() local
443 if (fpga_mii->mdio) in mii_mdio_active()
444 FPGA_SET_REG(fpga_mii->fpga, gpio.set, GPIO_MDIO); in mii_mdio_active()
446 FPGA_SET_REG(fpga_mii->fpga, gpio.clear, GPIO_MDIO); in mii_mdio_active()
453 struct fpga_mii *fpga_mii = bus->priv; in mii_mdio_tristate() local
455 FPGA_SET_REG(fpga_mii->fpga, gpio.set, GPIO_MDIO); in mii_mdio_tristate()
462 struct fpga_mii *fpga_mii = bus->priv; in mii_set_mdio() local
465 FPGA_SET_REG(fpga_mii->fpga, gpio.set, GPIO_MDIO); in mii_set_mdio()
467 FPGA_SET_REG(fpga_mii->fpga, gpio.clear, GPIO_MDIO); in mii_set_mdio()
469 fpga_mii->mdio = v; in mii_set_mdio()
477 struct fpga_mii *fpga_mii = bus->priv; in mii_get_mdio() local
479 FPGA_GET_REG(fpga_mii->fpga, gpio.read, &gpio); in mii_get_mdio()
488 struct fpga_mii *fpga_mii = bus->priv; in mii_set_mdc() local
491 FPGA_SET_REG(fpga_mii->fpga, gpio.set, GPIO_MDC); in mii_set_mdc()
493 FPGA_SET_REG(fpga_mii->fpga, gpio.clear, GPIO_MDC); in mii_set_mdc()
515 .priv = &fpga_mii[0],
526 .priv = &fpga_mii[1],
537 .priv = &fpga_mii[2],
548 .priv = &fpga_mii[3],