Lines Matching +full:10 +full:k
24 STATE_RX_FCS_ERR = 1<<10,
90 unsigned int k; in io_send() local
98 for (k = 0; k < sizeof(packet) / 2; ++k) in io_send()
101 for (k = 0; k < (size + 1) / 2; ++k) in io_send()
102 FPGA_SET_REG(fpga, ep.transmit_data, k); in io_send()
112 unsigned int k = 0; in io_receive() local
127 ++k; in io_receive()
135 unsigned int k = 0; in io_reflect() local
142 FPGA_GET_REG(fpga, ep.receive_data, &buffer[k++]); in io_reflect()
149 if (!k) in io_reflect()
152 for (n = 0; n < k; ++n) in io_reflect()
176 fpga = simple_strtoul(argv[1], NULL, 10); in do_ioreflect()
182 rate = simple_strtoul(argv[2], NULL, 10); in do_ioreflect()
237 fpga = simple_strtoul(argv[1], NULL, 10); in do_ioloop()
242 size = simple_strtoul(argv[2], NULL, 10); in do_ioloop()
248 rate = simple_strtoul(argv[3], NULL, 10); in do_ioloop()