1 // SPDX-License-Identifier: GPL-2.0+
7  * The RGMII PHYs are provided by the two on-board PHY connected to
8  * dTSEC instances 4 and 5. The SGMII PHYs are provided by one on-board
9  * PHY or by the standard four-port SGMII riser card (VSC).
20 #include <vsc9953.h>
28  /* - In T1040 there are only 8 SERDES lanes, spread across 2 SERDES banks.
29  *   Bank 1 -> Lanes A, B, C, D
30  *   Bank 2 -> Lanes E, F, G, H
120 	struct t1040_qds_mdio *priv = bus->priv;  in t1040_qds_mdio_read()
122 	t1040_qds_mux_mdio(priv->muxval);  in t1040_qds_mdio_read()
124 	return priv->realbus->read(priv->realbus, addr, devad, regnum);  in t1040_qds_mdio_read()
130 	struct t1040_qds_mdio *priv = bus->priv;  in t1040_qds_mdio_write()
132 	t1040_qds_mux_mdio(priv->muxval);  in t1040_qds_mdio_write()
134 	return priv->realbus->write(priv->realbus, addr, devad, regnum, value);  in t1040_qds_mdio_write()
139 	struct t1040_qds_mdio *priv = bus->priv;  in t1040_qds_mdio_reset()
141 	return priv->realbus->reset(priv->realbus);  in t1040_qds_mdio_reset()
151 		return -1;  in t1040_qds_mdio_init()
158 		return -1;  in t1040_qds_mdio_init()
161 	bus->read = t1040_qds_mdio_read;  in t1040_qds_mdio_init()
162 	bus->write = t1040_qds_mdio_write;  in t1040_qds_mdio_init()
163 	bus->reset = t1040_qds_mdio_reset;  in t1040_qds_mdio_init()
164 	strcpy(bus->name, t1040_qds_mdio_name_for_muxval(muxval));  in t1040_qds_mdio_init()
166 	pmdio->realbus = miiphy_get_dev_by_name(realbusname);  in t1040_qds_mdio_init()
168 	if (!pmdio->realbus) {  in t1040_qds_mdio_init()
172 		return -1;  in t1040_qds_mdio_init()
175 	pmdio->muxval = muxval;  in t1040_qds_mdio_init()
176 	bus->priv = pmdio;  in t1040_qds_mdio_init()
189 	int serdes1_prtcl = (in_be32(&gur->rcwsr[4]) &  in initialize_lane_to_slot()
195 	switch (serdes1_prtcl) {  in initialize_lane_to_slot()
273  * ... update the phy-handle property of the Ethernet node to point to the
281  * ports in U-Boot because on previous Ethernet devices (e.g. Gianfar), MACs
308 				(fm_info_get_phy_address(port - FM1_DTSEC1)-  in board_ft_fman_fixup_port()
320 		idx = i - FM1_DTSEC1;  in fdt_fixup_board_enet()
321 		switch (fm_info_get_enet_if(i)) {  in fdt_fixup_board_enet()
328 			switch (mdio_mux[i]) {  in fdt_fixup_board_enet()
370 	idx = i - FM1_DTSEC1;  in t1040_handle_phy_interface_sgmii()
378 	switch (slot) {  in t1040_handle_phy_interface_sgmii()
465 	/* Register the muxing front-ends to the MDIO buses */  in board_eth_init()
485 		switch (fm_info_get_enet_if(i)) {  in board_eth_init()
504 		lane = -1;  in board_eth_init()
507 		switch (i) {  in board_eth_init()
542 						i - 4;  in board_eth_init()
551 						+ i - 3;  in board_eth_init()
568 				out_be32(&scfg->esgmiiselcr,  in board_eth_init()
569 					 in_be32(&scfg->esgmiiselcr) |  in board_eth_init()