1 // SPDX-License-Identifier: GPL-2.0+
30 	struct cpu_type *cpu = gd->arch.cpu;  in checkboard()
35 	printf("Board: %sQDS, ", cpu->name);  in checkboard()
37 	printf("Board Version: %c, boot from ", (sw & 0xf) + 'A' - 1);  in checkboard()
79 	ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);  in select_i2c_ch_pca9547()
94 	srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) &  in board_mux_lane_to_slot()
148 		return -1;  in board_mux_lane_to_slot()
180 	if (hwconfig_arg_cmp("adaptor", "sdxc"))  in board_mux_setup()
193 	i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &reg, 1);  in board_retimer_ds125df111_init()
195 	i2c_write(I2C_MUX_PCA_ADDR_SEC, 0, 1, &reg, 1);  in board_retimer_ds125df111_init()
199 	i2c_write(I2C_RETIMER_ADDR, 0xff, 1, &reg, 1);  in board_retimer_ds125df111_init()
202 	i2c_read(I2C_RETIMER_ADDR, 1, 1, &reg, 1);  in board_retimer_ds125df111_init()
207 	i2c_write(I2C_RETIMER_ADDR, 0xff, 1, &reg, 1);  in board_retimer_ds125df111_init()
210 	i2c_read(I2C_RETIMER_ADDR, 0, 1, &reg, 1);  in board_retimer_ds125df111_init()
212 	i2c_write(I2C_RETIMER_ADDR, 0, 1, &reg, 1);  in board_retimer_ds125df111_init()
215 	i2c_read(I2C_RETIMER_ADDR, 9, 1, &reg, 1);  in board_retimer_ds125df111_init()
217 	i2c_write(I2C_RETIMER_ADDR, 9, 1, &reg, 1);  in board_retimer_ds125df111_init()
220 	i2c_read(I2C_RETIMER_ADDR, 0x18, 1, &reg, 1);  in board_retimer_ds125df111_init()
222 	i2c_write(I2C_RETIMER_ADDR, 0x18, 1, &reg, 1);  in board_retimer_ds125df111_init()
224 	/* Select active PFD MUX input as re-timed data (001) */  in board_retimer_ds125df111_init()
225 	i2c_read(I2C_RETIMER_ADDR, 0x1e, 1, &reg, 1);  in board_retimer_ds125df111_init()
228 	i2c_write(I2C_RETIMER_ADDR, 0x1e, 1, &reg, 1);  in board_retimer_ds125df111_init()
232 	i2c_write(I2C_RETIMER_ADDR, 0x60, 1, &reg, 1);  in board_retimer_ds125df111_init()
234 	i2c_write(I2C_RETIMER_ADDR, 0x61, 1, &reg, 1);  in board_retimer_ds125df111_init()
236 	i2c_write(I2C_RETIMER_ADDR, 0x62, 1, &reg, 1);  in board_retimer_ds125df111_init()
238 	i2c_write(I2C_RETIMER_ADDR, 0x63, 1, &reg, 1);  in board_retimer_ds125df111_init()
240 	i2c_write(I2C_RETIMER_ADDR, 0x64, 1, &reg, 1);  in board_retimer_ds125df111_init()
257 	int flash_esel = find_tlb_idx((void *)flashbase, 1);  in board_early_init_r()
260 	 * Remap Boot flash + PROMJET region to caching-inhibited  in board_early_init_r()
264 	/* Flush d-cache and invalidate i-cache of any FLASH data */  in board_early_init_r()
268 	if (flash_esel == -1) {  in board_early_init_r()
277 	set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,  in board_early_init_r()
279 		0, flash_esel, BOOKE_PAGESZ_256M, 1);  in board_early_init_r()
293 	u8 sysclk_conf = QIXIS_READ(brdcfg[1]);  in get_board_sys_clk()
318 	u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);  in get_board_ddr_clk()
394 	nr_of_cfgsw = QIXIS_READ(cms[1]);  in qixis_dump_switch()
397 	for (i = 1; i <= nr_of_cfgsw; i++) {  in qixis_dump_switch()
399 		printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1]));  in qixis_dump_switch()