Lines Matching +full:cost +full:- +full:effective
5 The P1010 is a cost-effective, low-power, highly integrated host processor
14 - 1Gbyte unbuffered DDR3 SDRAM discrete devices (32-bit bus)
15 - 32 Mbyte NOR flash single-chip memory
16 - 32 Mbyte NAND flash memory
17 - 256 Kbit M24256 I2C EEPROM
18 - 16 Mbyte SPI memory
19 - I2C Board EEPROM 128x8 bit memory
20 - SD/MMC connector to interface with the SD memory card
22 - PCIe:
23 - Lane0: x1 mini-PCIe slot
24 - Lane1: x1 PCIe standard slot
25 - SATA:
26 - 1 internal SATA connector to 2.5” 160G SATA2 HDD
27 - 1 eSATA connector to rear panel
28 - 10/100/1000 BaseT Ethernet ports:
29 - eTSEC1, RGMII: one 10/100/1000 port using Vitesse VSC8641XKO
30 - eTSEC2, SGMII: one 10/100/1000 port using Vitesse VSC8221
31 - eTSEC3, SGMII: one 10/100/1000 port using Vitesse VSC8221
32 - USB 2.0 port:
33 - x1 USB2.0 port via an external ULPI PHY to micro-AB connector
34 - x1 USB2.0 port via an internal UTMI PHY to micro-AB connector
35 - FlexCAN ports:
36 - 2 DB-9 female connectors for FlexCAN bus(revision 2.0B)
38 - DUART interface:
39 - DUART interface: supports two UARTs up to 115200 bps for
41 - RJ45 connectors are used for these 2 UART ports.
42 - TDM
43 - 2 FXS ports connected via an external SLIC to the TDM interface.
45 - 1 FXO port connected via a relay to FXS for switchover to POTS
47 - Mini-ITX power supply connector
48 - JTAG/COP for debugging
50 Real-time clock on I2C bus
52 - support critical POR setting changed via switch on board
54 - 6-layer routing (4-layer signals, 2-layer power and ground)
61 0xa000_0000 0xdfff_ffff PCI Express Mem 1G non-cacheable
62 0xee00_0000 0xefff_ffff NOR Flash 32M non-cacheable
63 0xffc2_0000 0xffc5_ffff PCI IO range 256K non-cacheable
65 0xffb0_0000 0xffbf_ffff Board CPLD 1M non-cacheable
67 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable
73 -Data rate: 115200 bps
74 -Number of data bits: 8
75 -Parity: None
76 -Number of Stop bits: 1
77 -Flow Control: Hardware/None
80 Settings of DIP-switch
91 "fsl_p1010mux:tdm_can=tdm" explicitly in u-booot prompt as below for example:
94 is set to spi-flash instead of to SLIC/TDM/DAC and tdm_can_sel is set to TDM
98 Build and burn U-Boot to NOR flash
100 1. Build u-boot.bin image
102 export CROSS_COMPILE=/your_path/powerpc-linux-gnu-
105 2. Burn u-boot.bin into NOR flash
116 1. Burn u-boot.bin into alternate NOR bank
130 0 - boot from upper 4 sectors
131 1 - boot from lower 4 sectors
134 Build and burn U-Boot to NAND flash
136 1. Build u-boot.bin image
138 export CROSS_COMPILE=/your_path/powerpc-linux-gnu-
141 2. Burn u-boot-nand.bin into NAND flash
142 => tftp $loadaddr $uboot-nand
149 Build and burn U-Boot to SPI flash
151 1. Build u-boot-spi.bin image
154 Download u-boot.bin to linux and you can find some config files
156 boot_format config_ddr3_1gb_p1010rdb_800M.dat u-boot.bin -spi \
157 u-boot-spi.bin
158 to generate u-boot-spi.bin.
160 2. Burn u-boot-spi.bin into SPI flash
161 => tftp $loadaddr $uboot-spi