freescale/m5253demo/m5253demo.c

1 // SPDX-License-Identifier: GPL-2.0+
3  * (C) Copyright 2000-2003
6  * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
47 		temp = (dramsize - 1) & 0xFFFC0000;  in dram_init()
77 	gd->ram_size = dramsize;  in dram_init()
102 	int piotms[5][9] = { {70, 165, 60, 30, 50, 5, 20, 0, 35},	/* PIO 0 */  in ide_set_reset()
103 	{50, 125, 45, 20, 35, 5, 15, 0, 35},	/* PIO 1 */  in ide_set_reset()
104 	{30, 100, 30, 15, 20, 5, 10, 0, 35},	/* PIO 2 */  in ide_set_reset()
105 	{30, 80, 30, 10, 20, 5, 10, 0, 35},	/* PIO 3 */  in ide_set_reset()
106 	{25, 70, 20, 10, 20, 5, 10, 0, 35}	/* PIO 4 */  in ide_set_reset()
111 		out_8(&ata->cr, 0);  in ide_set_reset()
116 #define CALC_TIMING(t) (t + period - 1) / period  in ide_set_reset()
119 		/*ata->ton = CALC_TIMING (180); */  in ide_set_reset()
120 		out_8(&ata->t1, CALC_TIMING(piotms[2][0]));  in ide_set_reset()
121 		out_8(&ata->t2w, CALC_TIMING(piotms[2][1]));  in ide_set_reset()
122 		out_8(&ata->t2r, CALC_TIMING(piotms[2][1]));  in ide_set_reset()
123 		out_8(&ata->ta, CALC_TIMING(piotms[2][8]));  in ide_set_reset()
124 		out_8(&ata->trd, CALC_TIMING(piotms[2][7]));  in ide_set_reset()
125 		out_8(&ata->t4, CALC_TIMING(piotms[2][3]));  in ide_set_reset()
126 		out_8(&ata->t9, CALC_TIMING(piotms[2][6]));  in ide_set_reset()
129 		out_8(&ata->cr, 0x40);  in ide_set_reset()
132 		setbits_8(&ata->cr, 0x01);  in ide_set_reset()