Lines Matching refs:FLASH_CYCLE1

21 #define FLASH_CYCLE1    0x5555  macro
132 	addr[FLASH_CYCLE1] = (FPWV) 0x00AA00AA;	/* for Atmel, Intel ignores this */  in flash_get_size()
134 	addr[FLASH_CYCLE1] = (FPWV) 0x00900090;	/* selects Intel or Atmel */  in flash_get_size()
226 			addr[FLASH_CYCLE1] = 0x00AA;	/* unlock */  in flash_erase()
228 			addr[FLASH_CYCLE1] = 0x0080;	/* erase mode */  in flash_erase()
229 			addr[FLASH_CYCLE1] = 0x00AA;	/* unlock */  in flash_erase()
283 					base[FLASH_CYCLE1] = 0x00AA;	/* unlock */  in flash_erase()
285 					base[FLASH_CYCLE1] = 0x0080;	/* erase mode */  in flash_erase()
286 					base[FLASH_CYCLE1] = 0x00AA;	/* unlock */  in flash_erase()
415 	base[FLASH_CYCLE1] = (u8) 0x00AA00AA;	/* unlock */  in write_word()
417 	base[FLASH_CYCLE1] = (u8) 0x00A000A0;	/* selects program mode */  in write_word()