1 // SPDX-License-Identifier: GPL-2.0+
3  * Copyright 2018-2019 NXP
18 #include <fsl-mc/fsl_mc.h>
125 	/* Check RCW field sdhc1_base_pmux to enable/disable  in esdhc_dspi_status_fixup()
128 	sdhc1_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1])  in esdhc_dspi_status_fixup()
144 	/* Check RCW field sdhc2_base_pmux to enable/disable  in esdhc_dspi_status_fixup()
147 	sdhc2_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR13_REGSR - 1])  in esdhc_dspi_status_fixup()
164 	iic5_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1])  in esdhc_dspi_status_fixup()
218 	printf("Board: %s-QDS, ", buf);  in checkboard()
220 	printf("Board: %s-RDB, ", buf);  in checkboard()
224 	printf("Board version: %c, boot from ", (sw & 0xf) - 1 + 'A');  in checkboard()
332 	sdhc1_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1])  in config_board_mux()
341 		/* - Routes {SDHC1_CMD, SDHC1_CLK } to SDHC1 adapter slot.  in config_board_mux()
354 	sdhc2_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR13_REGSR - 1])  in config_board_mux()
371 	iic5_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1])  in config_board_mux()
376 		/* - Routes {SDHC1_DAT4} to SPI3 devices as {SPI3_M_CS0_B}. */  in config_board_mux()
381 		/* - Routes {SDHC1_DAT5, SDHC1_DAT6} nowhere.  in config_board_mux()
394 		/* - Routes {SDHC1_DAT5, SDHC1_DAT6} to SDHC1 adapter slot.  in config_board_mux()
453 	gd->env_addr = (ulong)&default_environment[0];  in board_init()
472 		ddr_size += gd->bd->bi_dram[i].size;  in detail_board_ddr_info()
487 extern int fdt_fixup_board_phy(void *fdt);
489 void fdt_fixup_board_enet(void *fdt)  in fdt_fixup_board_enet()  argument
493 	offset = fdt_path_offset(fdt, "/soc/fsl-mc");  in fdt_fixup_board_enet()
496 		offset = fdt_path_offset(fdt, "/fsl-mc");  in fdt_fixup_board_enet()
499 		printf("%s: fsl-mc node not found in device tree (error %d)\n",  in fdt_fixup_board_enet()
505 		fdt_status_okay(fdt, offset);  in fdt_fixup_board_enet()
506 		fdt_fixup_board_phy(fdt);  in fdt_fixup_board_enet()
508 		fdt_status_fail(fdt, offset);  in fdt_fixup_board_enet()
514 	fsl_mc_ldpaa_exit(gd->bd);  in board_quiesce_devices()
530 		base[i] = gd->bd->bi_dram[i].start;  in ft_board_setup()
531 		size[i] = gd->bd->bi_dram[i].size;  in ft_board_setup()
536 	if (gd->arch.resv_ram >= base[0] &&  in ft_board_setup()
537 	    gd->arch.resv_ram < base[0] + size[0])  in ft_board_setup()
538 		size[0] = gd->arch.resv_ram - base[0];  in ft_board_setup()
539 	else if (gd->arch.resv_ram >= base[1] &&  in ft_board_setup()
540 		 gd->arch.resv_ram < base[1] + size[1])  in ft_board_setup()
541 		size[1] = gd->arch.resv_ram - base[1];  in ft_board_setup()
542 	else if (gd->arch.resv_ram >= base[2] &&  in ft_board_setup()
543 		 gd->arch.resv_ram < base[2] + size[2])  in ft_board_setup()
544 		size[2] = gd->arch.resv_ram - base[2];  in ft_board_setup()