Lines Matching +full:pcie +full:- +full:phy1
2 --------
3 The LS2080A Development System (QDS) is a high-performance computing,
10 --------------------
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A,
15 -----------------------
16 - SERDES Connections, 16 lanes supporting:
17 - PCI Express - 3.0
18 - SGMII, SGMII 2.5
19 - QSGMII
20 - SATA 3.0
21 - XAUI
22 - XFI
23 - DDR Controller
24 - Two ports of 72-bits (8-bits ECC) DDR4. Each port supports four
25 chip-selects and two DIMM connectors. Support is up to 2133MT/s.
26 - One port of 40-bits (8-bits ECC) DDR4 which supports four chip-selects
28 -IFC/Local Bus
29 - IFC rev. 2.0 implementation supporting Little Endian connection scheme.
30 - One in-socket 128 MB NOR flash 16-bit data bus
31 - One 512 MB NAND flash with ECC support
32 - IFC Test Port
33 - PromJet Port
34 - FPGA connection
35 - USB 3.0
36 - Two high speed USB 3.0 ports
37 - First USB 3.0 port configured as Host with Type-A connector
38 - Second USB 3.0 port configured as OTG with micro-AB connector
39 - SDHC: PCIe x1 Right Angle connector for supporting following cards
40 - 1/4-/8-bit SD/MMC Legacy CARD supporting 3.3V devices only
41 - 1-/4-/8-bit SD/MMC Card supporting 1.8V devices only
42 - 4-bit eMMC Card Rev 4.4 (1.8V only)
43 - 8-bit eMMC Card Rev 4.5 (1.8V only)
44 - SD Card Rev 2.0 and Rev 3.0
45 - DSPI: 3 high-speed flash Memory for storage
46 - 16 MB high-speed flash Memory for boot code and storage (up to 108MHz)
47 - 8 MB high-speed flash Memory (up to 104 MHz)
48 - 512 MB low-speed flash Memory (up to 40 MHz)
49 - QSPI: via NAND/QSPI Card
50 - 4 I2C controllers
51 - Two SATA onboard connectors
52 - UART
53 - Two 4-pin (HW control) or four 2-pin (SW control) serial ports at up to 115.2 Kbit/s
54 - Two DB9 D-Type connectors supporting one Serial port each
55 - ARM JTAG support
58 ----------------------------
67 Other addresses are either reserved, or not used directly by U-Boot.
71 -------------------------------
72 During boot i.e. IFC Region #1:-
73 0x30000000 - 0x37ffffff : 128MB : NOR flash
74 0x38000000 - 0x3BFFFFFF : 64MB : Promjet
75 0x3C000000 - 0x40000000 : 64MB : FPGA etc
77 After relocate to DDR i.e. IFC Region #2:-
85 ---------------
93 -------------------------
96 Boot firmware (U-Boot) 0x00100000
106 -------------------------
110 Boot firmware (U-Boot) 0x00100000 0x00800
119 ---------------------
120 - mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined
123 - mcmemsize: MC DRAM block size. If this variable is not defined
126 Booting Linux flavors which do not support 48-bit VA (< Linux 3.18)
127 -------------------------------------------------------------------
129 not support 48-bit VA (for e.g. < Linux 3.18) by appending mem=2048M, as shown
137 X-QSGMII-16PORT riser card
138 ----------------------------
139 The X-QSGMII-16PORT is a 4xQSGMII/8xSGMII riser card with eighth SerDes
140 interfaces implemented in PCIe form factor board.
142 - Card can operate with up to 4 QSGMII lane simultaneously
143 - Card can operate with up to 8 SGMII lane simultaneously
146 - CSEL : ON ON ON ON
147 - MSEL1 : ON ON ON ON OFF OFF OFF OFF
148 - MSEL2 : OFF OFF OFF OFF ON ON ON ON
163 DPMAC1 -> PHY1-P0
164 DPMAC2 -> PHY2-P0
165 DPMAC3 -> PHY3-P0
166 DPMAC4 -> PHY4-P0
167 DPMAC5 -> PHY3-P2
168 DPMAC6 -> PHY1-P2
169 DPMAC7 -> PHY4-P1
170 DPMAC8 -> PHY2-P2
171 DPMAC9 -> PHY1-P0
172 DPMAC10 -> PHY2-P0
173 DPMAC11 -> PHY3-P0
174 DPMAC12 -> PHY4-P0
175 DPMAC13 -> PHY3-P2
176 DPMAC14 -> PHY1-P2
177 DPMAC15 -> PHY4-P1
178 DPMAC16 -> PHY2-P2
200 DPMAC1 -> PHY1-P3
201 DPMAC2 -> PHY1-P2
202 DPMAC3 -> PHY1-P1
203 DPMAC4 -> PHY1-P0
204 DPMAC5 -> PHY2-P3
205 DPMAC6 -> PHY2-P2
206 DPMAC7 -> PHY2-P1
207 DPMAC8 -> PHY2-P0
208 DPMAC9 -> PHY3-P0
209 DPMAC10 -> PHY3-P1
210 DPMAC11 -> PHY3-P2
211 DPMAC12 -> PHY3-P3
212 DPMAC13 -> PHY4-P0
213 DPMAC14 -> PHY4-P1
214 DPMAC15 -> PHY4-P2
215 DPMAC16 -> PHY4-P3