Lines Matching +full:0 +full:x3c000000
59 0x00_0000_0000 .. 0x00_000F_FFFF Boot Rom
60 0x00_0100_0000 .. 0x00_0FFF_FFFF CCSR
61 0x00_1800_0000 .. 0x00_181F_FFFF OCRAM
62 0x00_3000_0000 .. 0x00_3FFF_FFFF IFC region #1
63 0x00_8000_0000 .. 0x00_FFFF_FFFF DDR region #1
64 0x05_1000_0000 .. 0x05_FFFF_FFFF IFC region #2
65 0x80_8000_0000 .. 0xFF_FFFF_FFFF DDR region #2
73 0x30000000 - 0x37ffffff : 128MB : NOR flash
74 0x38000000 - 0x3BFFFFFF : 64MB : Promjet
75 0x3C000000 - 0x40000000 : 64MB : FPGA etc
78 0x5_1000_0000..0x5_1fff_ffff Memory Hole
79 0x5_2000_0000..0x5_3fff_ffff IFC CSx (FPGA, NAND and others 512MB)
80 0x5_4000_0000..0x5_7fff_ffff ASIC or others 1GB
81 0x5_8000_0000..0x5_bfff_ffff IFC CS0 1GB (NOR/Promjet)
82 0x5_C000_0000..0x5_ffff_ffff IFC CS1 1GB (NOR/Promjet)
95 RCW+PBI 0x00000000
96 Boot firmware (U-Boot) 0x00100000
97 Boot firmware Environment 0x00300000
98 PPA firmware 0x00400000
99 Secure Headers 0x00600000
100 DPAA2 MC 0x00A00000
101 DPAA2 DPL 0x00D00000
102 DPAA2 DPC 0x00E00000
103 Kernel.itb 0x01000000
109 RCW+PBI 0x00000000 0x00008
110 Boot firmware (U-Boot) 0x00100000 0x00800
111 Boot firmware Environment 0x00300000 0x01800
112 PPA firmware 0x00400000 0x02000
113 DPAA2 MC 0x00A00000 0x05000
114 DPAA2 DPL 0x00D00000 0x06800
115 DPAA2 DPC 0x00E00000 0x07000
116 Kernel.itb 0x01000000 0x08000
133 earlycon=uart8250,mmio,0x21c0600,115200 default_hugepagesz=2m hugepagesz=2m
153 #define XQSGMII_CARD_PHY1_PORT0_ADDR 0x0
154 #define XQSGMII_CARD_PHY1_PORT2_ADDR 0x2
155 #define XQSGMII_CARD_PHY2_PORT0_ADDR 0x4
156 #define XQSGMII_CARD_PHY2_PORT2_ADDR 0x6
157 #define XQSGMII_CARD_PHY3_PORT0_ADDR 0x8
158 #define XQSGMII_CARD_PHY3_PORT2_ADDR 0xa
159 #define XQSGMII_CARD_PHY4_PORT0_ADDR 0xc
160 #define XQSGMII_CARD_PHY4_PORT2_ADDR 0xe
182 #define XQSGMII_CARD_PHY1_PORT0_ADDR 0x0
183 #define XQSGMII_CARD_PHY1_PORT1_ADDR 0x1
184 #define XQSGMII_CARD_PHY1_PORT2_ADDR 0x2
185 #define XQSGMII_CARD_PHY1_PORT3_ADDR 0x3
186 #define XQSGMII_CARD_PHY2_PORT0_ADDR 0x4
187 #define XQSGMII_CARD_PHY2_PORT1_ADDR 0x5
188 #define XQSGMII_CARD_PHY2_PORT2_ADDR 0x6
189 #define XQSGMII_CARD_PHY2_PORT3_ADDR 0x7
190 #define XQSGMII_CARD_PHY3_PORT0_ADDR 0x8
191 #define XQSGMII_CARD_PHY3_PORT1_ADDR 0x9
192 #define XQSGMII_CARD_PHY3_PORT2_ADDR 0xa
193 #define XQSGMII_CARD_PHY3_PORT3_ADDR 0xb
194 #define XQSGMII_CARD_PHY4_PORT0_ADDR 0xc
195 #define XQSGMII_CARD_PHY4_PORT1_ADDR 0xd
196 #define XQSGMII_CARD_PHY4_PORT2_ADDR 0xe
197 #define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf