Lines Matching +full:retimer +full:- +full:switch
1 // SPDX-License-Identifier: GPL-2.0+
18 #include <asm/arch-fsl-layerscape/fsl_icid.h>
167 regs_info->regs = ifc_cfg_nand_boot; in ifc_cfg_boot_info()
169 regs_info->regs = ifc_cfg_nor_boot; in ifc_cfg_boot_info()
170 regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT; in ifc_cfg_boot_info()
234 switch (sysclk_conf & 0x0f) { in get_board_sys_clk()
262 switch ((ddrclk_conf & 0x30) >> 4) { in get_board_ddr_clk()
291 * in the default channel. So, switch to the default channel in dram_init()
298 /* This will break-before-make MMU for DDR */ in dram_init()
314 /* Retimer is connected to I2C1_CH7_CH5 */ in board_retimer_init()
325 debug("Retimer version id = 0x%x\n", reg); in board_retimer_init()
346 /* Selects active PFD MUX Input as Re-timed Data (001) */ in board_retimer_init()
384 out_be32(&scfg->rcwpmuxcr0, 0x3333); in board_early_init_f()
385 out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1); in board_early_init_f()
390 out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); in board_early_init_f()
411 if (in_be32(&gur->crstsr) & DCFG_CCSR_CRSTSR_WDRFR) in is_warm_boot()
424 switch (ctrl_type) { in config_board_mux()
430 return -1; in config_board_mux()
482 base[0] = gd->bd->bi_dram[0].start; in ft_board_setup()
483 size[0] = gd->bd->bi_dram[0].size; in ft_board_setup()
484 base[1] = gd->bd->bi_dram[1].start; in ft_board_setup()
485 size[1] = gd->bd->bi_dram[1].size; in ft_board_setup()