336 	fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR);  in board_eth_init()
337 	fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR);  in board_eth_init()
342 		fm_info_set_phy_address(FM1_DTSEC9, 9);  in board_eth_init()
347 		fm_info_set_phy_address(FM1_DTSEC1,  in board_eth_init()
349 		fm_info_set_phy_address(FM1_DTSEC2,  in board_eth_init()
351 		fm_info_set_phy_address(FM1_DTSEC5,  in board_eth_init()
353 		fm_info_set_phy_address(FM1_DTSEC6,  in board_eth_init()
358 		fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT1_PHY_ADDR);  in board_eth_init()
362 		fm_info_set_phy_address(FM1_DTSEC9, 9);  in board_eth_init()
364 		fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT1_PHY_ADDR);  in board_eth_init()
368 		fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT1_PHY_ADDR);  in board_eth_init()
372 		fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT1_PHY_ADDR);  in board_eth_init()
376 		fm_info_set_phy_address(FM1_DTSEC9, SGMII_CARD_PORT1_PHY_ADDR);  in board_eth_init()
380 		fm_info_set_phy_address(FM1_DTSEC1,  in board_eth_init()
382 		fm_info_set_phy_address(FM1_DTSEC2,  in board_eth_init()
384 		fm_info_set_phy_address(FM1_DTSEC5,  in board_eth_init()
386 		fm_info_set_phy_address(FM1_DTSEC6,  in board_eth_init()
391 		fm_info_set_phy_address(FM1_DTSEC9, 9);  in board_eth_init()
393 		fm_info_set_phy_address(FM1_DTSEC1,  in board_eth_init()
395 		fm_info_set_phy_address(FM1_DTSEC2,  in board_eth_init()
397 		fm_info_set_phy_address(FM1_DTSEC5,  in board_eth_init()
399 		fm_info_set_phy_address(FM1_DTSEC6,  in board_eth_init()
404 		fm_info_set_phy_address(FM1_DTSEC9, 9);  in board_eth_init()
406 		fm_info_set_phy_address(FM1_DTSEC2, 2);  in board_eth_init()
410 		fm_info_set_phy_address(FM1_DTSEC9,  in board_eth_init()
412 		fm_info_set_phy_address(FM1_DTSEC2,  in board_eth_init()
414 		fm_info_set_phy_address(FM1_DTSEC5,  in board_eth_init()
416 		fm_info_set_phy_address(FM1_DTSEC6,  in board_eth_init()