12 #define pixis_base (u8 *)PIXIS_BASE  macro
19 	out_8(pixis_base + PIXIS_RST, 0);  in pixis_reset()
88 	out_8(pixis_base + PIXIS_VCLKH, vclkh);  in set_px_sysclk()
89 	out_8(pixis_base + PIXIS_VCLKL, vclkl);  in set_px_sysclk()
91 	out_8(pixis_base + PIXIS_AUX, sysclk_aux);  in set_px_sysclk()
112 		clrsetbits_8(pixis_base + PIXIS_VSPEED1, 0x1F, mpxpll);  in set_px_mpxpll()
148 	clrsetbits_8(pixis_base + PIXIS_VSPEED0, 0x1F, val);  in set_px_corepll()
167 	u8 tmp = in_8(pixis_base + PIXIS_VCFGEN0);  in read_from_px_regs()
174 	out_8(pixis_base + PIXIS_VCFGEN0, tmp);  in read_from_px_regs()
194 	u8 tmp = in_8(pixis_base + PIXIS_VCFGEN1);  in read_from_px_regs_altbank()
201 	out_8(pixis_base + PIXIS_VCFGEN1, tmp);  in read_from_px_regs_altbank()
223 	clrbits_8(pixis_base + PIXIS_VBOOT, CONFIG_SYS_PIXIS_VBOOT_MASK);  in clear_altbank()
233 	setbits_8(pixis_base + PIXIS_VBOOT, CONFIG_SYS_PIXIS_VBOOT_MASK);  in set_altbank()
243 	clrbits_8(pixis_base + PIXIS_VCTL, 9);  in set_px_go()
246 	setbits_8(pixis_base + PIXIS_VCTL, 0x1);  in set_px_go()
258 	clrbits_8(pixis_base + PIXIS_VCTL, 1);  in set_px_go_with_watchdog()
261 	setbits_8(pixis_base + PIXIS_VCTL, 0x9);  in set_px_go_with_watchdog()
273 	clrbits_8(pixis_base + PIXIS_VCTL, 9);  in pixis_disable_watchdog_cmd()
330 		clrbits_8(pixis_base + PIXIS_VCFGEN1, switch_mask);  in pixis_set_sgmii()
332 		setbits_8(pixis_base + PIXIS_VCFGEN1, switch_mask);  in pixis_set_sgmii()
336 		clrbits_8(pixis_base + PIXIS_VSPEED2, mask);  in pixis_set_sgmii()
338 		setbits_8(pixis_base + PIXIS_VSPEED2, mask);  in pixis_set_sgmii()