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4 Tensilica's 'xtfpga' evaluation boards are actually a set of different
5 boards that share configurations. The following is a list of supported
18 - A 16550 compatible UART and serial port.
20 - A 32 char two line LCD display. (except for the LX200)
25 - 128MB / 64MB (LX60) memory
38 - 128MB Linear BPI Flash
45 A terminal emulator must be set accordingly to see the U-Boot prompt.
52 the boot mapping and selects from a range of default ethernet MAC
65 tool such as the Xtensa OCD Daemon connected via a suppored probe.
67 connect them. Be aware that the board has only 128 KB of SRAM,
69 intended for the Flash. This issues is discussed in a separate
75 The Flash is always mapped at a device (memory mapped I/O) address
83 been reinitialized, the ethernet MAC address receives a default
103 The XT-AV60 board has only 128 KB of SDRAM that can be mapped
104 to the system ROM address space for debugging a ROM image under
105 OCD/JTAG. This limits the useful size of U-Boot to 128 KB (0x20000)
108 This can pose a problem if all the sources are compiled with -O0
113 necessary as long as only a limited set of sources need to be
114 debugged, because the image can still fit into the 128 KB SRAM.
123 if one doesn't expect it, the linker script provides a link-time
124 check and fatal error message if the image size exceeds 128 KB.