board/aristainetos/aristainetos.c

1 // SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/imx-regs.h>
15 #include <asm/arch/mx6-pins.h>
18 #include <asm/mach-imx/iomux-v3.h>
19 #include <asm/mach-imx/boot_mode.h>
20 #include <asm/mach-imx/mxc_i2c.h>
21 #include <asm/mach-imx/video.h>
62 #include "./aristainetos-v1.c"
64 #include "./aristainetos-v2.c"
72 		.gp = IMX_GPIO_NR(5, 27)
77 		.gp = IMX_GPIO_NR(5, 26)
85 		.gp = IMX_GPIO_NR(4, 12)
90 		.gp = IMX_GPIO_NR(4, 13)
105 	gd->ram_size = imx_ddr_size();  in dram_init()
130 	 * which causes DAT3 to be driven low towards the SD-card.  in board_mmc_init()
131 	 * This causes a SD-card enetring the SPI-Mode  in board_mmc_init()
134 	 * This makes usdhc2 unusable in u-boot, but works for the  in board_mmc_init()
147  * Use always serial for U-Boot console
156 		.bus	= -1,
179 		.bus	= -1,
239 	clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);  in setup_gpmi_nand()
242 	clrsetbits_le32(&mxc_ccm->cs2cdr,  in setup_gpmi_nand()
251 	setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);  in setup_gpmi_nand()
254 	setbits_le32(&mxc_ccm->CCGR4,  in setup_gpmi_nand()
262 	setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);  in setup_gpmi_nand()
270 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;  in board_init()
292 	clrsetbits_le32(&iomux->gpr[1], IOMUXC_GPR1_USB_OTG_ID_SEL_MASK, 0);  in board_init()
308 	ret = gpio_request(ARISTAINETOS_USB_H1_PWR, "usb-h1-pwr");  in board_ehci_hcd_init()
311 	ret = gpio_request(ARISTAINETOS_USB_OTG_PWR, "usb-OTG-pwr");  in board_ehci_hcd_init()