Seagate/dockstar/kwbimage.cfg

1 # SPDX-License-Identifier: GPL-2.0+
9 # Refer doc/README.kwbimage for more details about how-to configure
21 # Configure RGMII-0 interface pad voltage to 1.8V
26 # bit13-0:  0xc30 (3120 DDR2 clks refresh rate)
27 # bit23-14: zero
28 # bit24: 1= enable exit self refresh mode on DDR access
30 # bit29-26: zero
31 # bit31-30: 01
35 # bit 5:    0=clk is driven during self refresh, we don't care for APX
37 # bit14:    0=input buffer always powered up
39 # bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
40 # bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
41 # bit30-28: 3 required
45 # bit3-0:   TRAS lsbs
46 # bit7-4:   TRCD
47 # bit11- 8: TRP
48 # bit15-12: TWR
49 # bit19-16: TWTR
51 # bit23-21: 0x0
52 # bit27-24: TRRD
53 # bit31-28: TRTP
56 # bit6-0:   TRFC
57 # bit8-7:   TR2R
58 # bit10-9:  TR2W
59 # bit12-11: TW2W
60 # bit31-13: zero required
63 # bit1-0:   00, Cs0width=x8
64 # bit3-2:   11, Cs0size=1Gb
65 # bit5-4:   00, Cs1width=nonexistent
66 # bit7-6:   00, Cs1size =nonexistent
67 # bit9-8:   00, Cs2width=nonexistent
68 # bit11-10: 00, Cs2size =nonexistent
69 # bit13-12: 00, Cs3width=nonexistent
70 # bit15-14: 00, Cs3size =nonexistent
75 # bit31-20: 0 required
79 # bit31-1: 0 required
82 # bit3-0:   0x0, DDR cmd
83 # bit31-4:  0 required
86 # bit2-0:   2, BurstLen=2 required
88 # bit6-4:   4, CL=5
91 # bit11-9:  6, auto-precharge write recovery ????????????
93 # bit31-13: 0 required
99 # bit5-3:  000, required
101 # bit9-7:  000, required
105 # bit31-13: 0 required
108 # bit2-0:  111, required
110 # bit6-4:  111, required
116 # bit15-12: 1111 required
117 # bit31-16: 0    required
126 # bit3-2:  00, CS0 hit selected
127 # bit23-4: ones, required
128 # bit31-24: 0x07, Size (i.e. 128MB)
138 # bit1-0:  00, ODT0 controlled by ODT Control (low) register above
139 # bit3-2:  01, ODT1 active NEVER!
140 # bit31-4: zero, required