Lines Matching +full:uart +full:- +full:routing

1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include <dt-bindings/interrupt-router/intel-irq.h>
31 #address-cells = <1>;
32 #size-cells = <0>;
36 compatible = "cpu-x86";
38 intel,apic-id = <0>;
43 compatible = "cpu-x86";
45 intel,apic-id = <1>;
53 * U-Boot serial console. If we want to use UART from Topcliff
56 * For example, stdout-path = &pciuart0 will use the first
57 * UART on Topcliff PCH.
59 stdout-path = "/serial";
69 #address-cells = <3>;
70 #size-cells = <2>;
71 compatible = "pci-x86";
72 u-boot,dm-pre-reloc;
78 #address-cells = <3>;
79 #size-cells = <2>;
80 compatible = "pci-bridge";
81 u-boot,dm-pre-reloc;
85 #address-cells = <3>;
86 #size-cells = <2>;
87 compatible = "pci-bridge";
88 u-boot,dm-pre-reloc;
91 pciuart0: uart@a,1 {
97 u-boot,dm-pre-reloc;
100 reg-shift = <0>;
101 clock-frequency = <1843200>;
102 current-speed = <115200>;
105 pciuart1: uart@a,2 {
111 u-boot,dm-pre-reloc;
114 reg-shift = <0>;
115 clock-frequency = <1843200>;
116 current-speed = <115200>;
119 pciuart2: uart@a,3 {
125 u-boot,dm-pre-reloc;
128 reg-shift = <0>;
129 clock-frequency = <1843200>;
130 current-speed = <115200>;
133 pciuart3: uart@a,4 {
139 u-boot,dm-pre-reloc;
142 reg-shift = <0>;
143 clock-frequency = <1843200>;
144 current-speed = <115200>;
152 #address-cells = <1>;
153 #size-cells = <1>;
155 irq-router {
156 compatible = "intel,irq-router";
157 intel,pirq-config = "pci";
158 intel,actl-addr = <0x58>;
159 intel,pirq-link = <0x60 8>;
160 intel,pirq-mask = <0xcee0>;
161 intel,pirq-routing = <
189 * devices per U-Boot current PCI bus
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "intel,ich7-spi";
224 spi-flash@0 {
227 "spi-flash";
228 memory-map = <0xffe00000 0x00200000>;
233 compatible = "intel,ich6-gpio";
234 u-boot,dm-pre-reloc;
236 bank-name = "A";
240 compatible = "intel,ich6-gpio";
241 u-boot,dm-pre-reloc;
243 bank-name = "B";