210 	 * Training performed in address mode 0, rank population has limited  in prog_decode_before_jedec()
211 	 * impact, however simulator complains if enabled non-existing rank.  in prog_decode_before_jedec()
256 	uint8_t rk;	/* rank counter */  in ddrphy_init()
1150 	uint8_t twr, wl, rank;  in perform_jedec_init()  local
1178 	 * then send NOP to each rank (#4550197)  in perform_jedec_init()
1190 	for (rank = 0; rank < NUM_RANKS; rank++) {  in perform_jedec_init()
1191 		/* Skip to next populated rank */  in perform_jedec_init()
1192 		if ((mrc_params->rank_enables & (1 << rank)) == 0)  in perform_jedec_init()
1195 		dram_init_command(DCMD_NOP(rank));  in perform_jedec_init()
1299 	for (rank = 0; rank < NUM_RANKS; rank++) {  in perform_jedec_init()
1300 		/* Skip to next populated rank */  in perform_jedec_init()
1301 		if ((mrc_params->rank_enables & (1 << rank)) == 0)  in perform_jedec_init()
1304 		emrs2_cmd |= (rank << 22);  in perform_jedec_init()
1307 		emrs3_cmd |= (rank << 22);  in perform_jedec_init()
1310 		emrs1_cmd |= (rank << 22);  in perform_jedec_init()
1313 		mrs0_cmd |= (rank << 22);  in perform_jedec_init()
1316 		dram_init_command(DCMD_ZQCL(rank));  in perform_jedec_init()
1400  * All byte lanes will be calibrated "simultaneously" per channel per rank.
1405 	uint8_t rk;	/* rank counter */  in rcvn_cal()
1447 			/* perform RCVEN Calibration on a per rank basis */  in rcvn_cal()
1452 					 * channel and rank being calibrated  in rcvn_cal()
1547  * This algorithm will act on each rank in each channel separately.
1552 	uint8_t rk;	/* rank counter */  in wr_level()
1593 			/* perform WRITE LEVELING algorithm on a per rank basis */  in wr_level()
1598 					 * rank and channel being calibrated  in wr_level()
1709 					/* get an address in the targeted channel/rank */  in wr_level()
1787 	uint8_t rk;	/* rank counter */  in rd_train()
1887 							/* get an address in the target channel/rank */  in rd_train()
1966 						    "RDQS T/B eye rank%d lane%d : %d-%d %d-%d\n",  in rd_train()
2085 	uint8_t rk;	/* rank counter */  in wr_train()
2185 						/* get an address in the target channel/rank */  in wr_train()
2244 						    "WDQ eye rank%d lane%d : %d-%d\n",  in wr_train()
2388  * After training complete configure MCU Rank Population Register
2482 	uint32_t rank;  in set_auto_refresh()  local
2525 			for (rank = 0; rank < NUM_RANKS; rank++) {  in set_auto_refresh()
2526 				if (mrc_params->rank_enables & (1 << rank))  in set_auto_refresh()
2527 					dram_init_command(DCMD_ZQCS(rank));  in set_auto_refresh()