Lines Matching refs:msr_write
81 msr_write(MSR_IA32_FEATURE_CONTROL, msr); in enable_vmx()
212 msr_write(MSR_PKG_POWER_LIMIT, limit); in set_power_limits()
219 msr_write(MSR_TURBO_ACTIVATION_RATIO, limit); in set_power_limits()
235 msr_write(MSR_PMG_CST_CONFIG_CTL, msr); in configure_c_states()
241 msr_write(MSR_PMG_IO_CAPTURE_ADR, msr); in configure_c_states()
245 msr_write(MSR_MISC_PWR_MGMT, msr); in configure_c_states()
251 msr_write(MSR_POWER_CTL, msr); in configure_c_states()
256 msr_write(MSR_PKGC3_IRTL, msr); in configure_c_states()
261 msr_write(MSR_PKGC6_IRTL, msr); in configure_c_states()
266 msr_write(MSR_PKGC7_IRTL, msr); in configure_c_states()
272 msr_write(MSR_PP0_CURRENT_CONFIG, msr); in configure_c_states()
282 msr_write(MSR_PP1_CURRENT_CONFIG, msr); in configure_c_states()
299 msr_write(MSR_TEMPERATURE_TARGET, msr); in configure_thermal_target()
313 msr_write(IA32_MISC_ENABLE, msr); in configure_misc()
318 msr_write(IA32_THERM_INTERRUPT, msr); in configure_misc()
323 msr_write(IA32_PACKAGE_THERM_INTERRUPT, msr); in configure_misc()
332 msr_write(MSR_PIC_MSG_CONTROL, msr); in enable_lapic_tpr()
345 msr_write(IA32_PLATFORM_DCA_CAP, msr); in configure_dca_cap()
365 msr_write(MSR_IA32_PERF_CTL, perf_ctl); in set_max_ratio()
379 msr_write(IA32_ENERGY_PERFORMANCE_BIAS, msr); in set_energy_perf_bias()
393 msr_write(IA32_MC0_STATUS + (i * 4), msr); in configure_mca()