164 	msr_t limit;  in set_power_limits()  local
199 	/* Set long term power limit to TDP */  in set_power_limits()
200 	limit.lo = 0;  in set_power_limits()
201 	limit.lo |= tdp & PKG_POWER_LIMIT_MASK;  in set_power_limits()
202 	limit.lo |= PKG_POWER_LIMIT_EN;  in set_power_limits()
203 	limit.lo |= (power_limit_1_val & PKG_POWER_LIMIT_TIME_MASK) <<  in set_power_limits()
206 	/* Set short term power limit to 1.25 * TDP */  in set_power_limits()
207 	limit.hi = 0;  in set_power_limits()
208 	limit.hi |= ((tdp * 125) / 100) & PKG_POWER_LIMIT_MASK;  in set_power_limits()
209 	limit.hi |= PKG_POWER_LIMIT_EN;  in set_power_limits()
210 	/* Power limit 2 time is only programmable on SNB EP/EX */  in set_power_limits()
212 	msr_write(MSR_PKG_POWER_LIMIT, limit);  in set_power_limits()
217 		limit.hi = 0;  in set_power_limits()
218 		limit.lo = msr.lo & 0xff;  in set_power_limits()
219 		msr_write(MSR_TURBO_ACTIVATION_RATIO, limit);  in set_power_limits()
234 	msr.lo |= 7;		/* No package C-state limit */  in configure_c_states()
253 	/* C3 Interrupt Response Time Limit */  in configure_c_states()
258 	/* C6 Interrupt Response Time Limit */  in configure_c_states()
263 	/* C7 Interrupt Response Time Limit */  in configure_c_states()
268 	/* Primary Plane Current Limit */  in configure_c_states()
274 	/* Secondary Plane Current Limit */  in configure_c_states()