Lines Matching +full:0 +full:xf0400000
21 #size-cells = <0>;
23 CPU0: cpu@0 {
25 reg = <0>;
31 d-cache-size = <0x8000>;
41 memory@0 {
43 reg = <0x0 0x00000000 0x0 0x40000000>;
57 reg = <0x0 0xe4000000 0x0 0x2000000>;
67 reg = <0x0 0xe6400000 0x0 0x400000>;
75 reg = <0x0 0xe6000000 0x0 0x100000>;
80 #clock-cells = <0>;
87 reg = <0x0 0xf0400000 0x0 0x1000>;
95 reg = <0x0 0xf0300000 0x0 0x1000>;
106 reg = <0x0 0xe0100000 0x0 0x1000>;
115 fifo-depth = <0x10>;
116 reg = <0x0 0xf0e00000 0x0 0x1000>;
124 reg = <0x0 0xf0c00000 0x0 0x1000>;
132 reg = <0x0 0xe0200000 0x0 0x1000>;
139 reg = <0x0 0xe0400000 0x0 0x1000>;
144 reg = <0x0 0xf0d00000 0x0 0x1000>;
150 interrupts = <0x17 0x4>;
151 interrupt-parent = <0x2>;
152 reg = <0x0 0xfe007000 0x0 0x1000>;
157 interrupts = <0x16 0x4>;
158 interrupt-parent = <0x2>;
159 reg = <0x0 0xfe006000 0x0 0x1000>;
164 interrupts = <0x15 0x4>;
165 interrupt-parent = <0x2>;
166 reg = <0x0 0xfe005000 0x0 0x1000>;
171 interrupts = <0x14 0x4>;
172 interrupt-parent = <0x2>;
173 reg = <0x0 0xfe004000 0x0 0x1000>;
178 interrupts = <0x13 0x4>;
179 interrupt-parent = <0x2>;
180 reg = <0x0 0xfe003000 0x0 0x1000>;
185 interrupts = <0x12 0x4>;
186 interrupt-parent = <0x2>;
187 reg = <0x0 0xfe002000 0x0 0x1000>;
192 interrupts = <0x11 0x4>;
193 interrupt-parent = <0x2>;
194 reg = <0x0 0xfe001000 0x0 0x1000>;
199 interrupts = <0x10 0x4>;
200 interrupt-parent = <0x2>;
201 reg = <0x0 0xfe000000 0x0 0x1000>;
205 nor@0,0 {
207 reg = <0x0 0x88000000 0x0 0x1000>;
214 reg = <0x0 0xf0b00000 0x0 0x1000>;
216 #size-cells = <0>;
221 flash@0 {
224 reg = <0>;