Lines Matching +full:- +full:clint

1 menu "RISC-V architecture"
12 	bool "Support ax25-ae350"
22 # board-specific options below
23 source "board/AndesTech/ax25-ae350/Kconfig"
24 source "board/emulation/qemu-riscv/Kconfig"
27 # platform-specific options below
31 # architecture-specific options below
59 	  U-Boot and its statically defined symbols must lie within a single 2 GiB
60 	  address range and must lie between absolute addresses -2 GiB and +2 GiB.
65 	  U-Boot and its statically defined symbols must be within any single 2 GiB
77 	  Choose this option to build U-Boot for RISC-V M-Mode.
82 	  Choose this option to build U-Boot for RISC-V S-Mode.
91 	  when building U-Boot, which results in compressed instructions in the
92 	  U-Boot binary.
109 	  The SiFive CLINT block holds memory-mapped control and status registers
117 	  standard rdtime instruction. This is the case for S-mode U-Boot, and
118 	  is useful for processors that support rdtime in M-mode too.