1 /* SPDX-License-Identifier: GPL-2.0+ */
3  * Copyright 2009-2011 Freescale Semiconductor, Inc.
34 	  .reg_offset[0] = offsetof(struct ccsr_rio, liodn) \
35 		+ (port - 1) * 0x200 \
49 	 * We need to support both new and old compatibles in order not to
59 extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
91 #define SET_GUTS_LIODN(compat, liodn, name, compatoff) \  argument
92 	SET_LIODN_ENTRY_1(compat, liodn, \
96 #define SET_USB_LIODN(usbNum, compat, liodn) \  argument
97 	SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\
100 #define SET_SATA_LIODN(sataNum, liodn) \  argument
101 	SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\
104 #define SET_PCI_LIODN(compat, pciNum, liodn) \  argument
105 	SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
108 #define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \  argument
109 	SET_LIODN_ENTRY_1(compat, liodn,\
114 #define SET_DMA_LIODN(dmaNum, compat, liodn) \  argument
115 	SET_GUTS_LIODN(compat, liodn, dma##dmaNum##liodnr,\
118 #define SET_SDHC_LIODN(sdhcNum, liodn) \  argument
119 	SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
122 #define SET_QE_LIODN(liodn) \  argument
123 	SET_GUTS_LIODN("fsl,qe", liodn, qeliodnr,\
126 #define SET_TDM_LIODN(liodn) \  argument
127 	SET_GUTS_LIODN("fsl,tdm1.0", liodn, tdmliodnr,\
130 #define SET_QMAN_LIODN(liodn) \  argument
131 	SET_LIODN_ENTRY_1("fsl,qman", liodn, \
136 #define SET_BMAN_LIODN(liodn) \  argument
137 	SET_LIODN_ENTRY_1("fsl,bman", liodn, \
142 #define SET_PME_LIODN(liodn) \  argument
143 	SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
147 #define SET_PMAN_LIODN(num, liodn) \  argument
148 	SET_LIODN_ENTRY_2("fsl,pman", liodn, 0, \
153 /* -1 from portID due to how immap has the registers */
156 	offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])
159 /* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
160 #define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \  argument
161 	SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx", \
162 		liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
165 /* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
166 #define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \  argument
167 	SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx", \
168 		liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
171 /* enetNum is 0, 1, 2... so we + 8 for type-2 10g to get to HW Port ID */
172 #define SET_FMAN_RX_10G_TYPE2_LIODN(fmNum, enetNum, liodn) \  argument
173 	SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx", \
174 		liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
177 /* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
178 #define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \  argument
179 	SET_FMAN_LIODN_ENTRY("fsl,fman-v2-port-rx", "fsl,fman-port-1g-rx", \
180 		liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
183 /* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
184 #define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \  argument
185 	SET_FMAN_LIODN_ENTRY("fsl,fman-v2-port-rx", "fsl,fman-port-10g-rx", \
186 		liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
191  * "fsl,secX.Y" became "fsl,sec-vX.Y" during development
194 	SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB,\
198 	SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\
205 	SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \
207 		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
209 		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
210 	SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \
212 		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
214 		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
222 	SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \
229 #define SET_RMAN_LIODN(ibNum, liodn) \  argument
230 	SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \