Lines Matching +full:watchdog +full:- +full:timers
1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2002
8 #include <watchdog.h>
23 memctl8xx_t __iomem *memctl = &immr->im_memctl; in cpu_init_f()
26 /* SYPCR - contains watchdog control (11-9) */ in cpu_init_f()
29 /* deactivate watchdog if not enabled in config */ in cpu_init_f()
30 out_be32(&immr->im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR & ~SYPCR_SWE); in cpu_init_f()
35 /* SIUMCR - contains debug pin configuration (11-6) */ in cpu_init_f()
36 setbits_be32(&immr->im_siu_conf.sc_siumcr, CONFIG_SYS_SIUMCR); in cpu_init_f()
37 /* initialize timebase status and control register (11-26) */ in cpu_init_f()
40 out_be32(&immr->im_sitk.sitk_tbscrk, KAPWR_KEY); in cpu_init_f()
41 out_be16(&immr->im_sit.sit_tbscr, CONFIG_SYS_TBSCR | TBSCR_TBE); in cpu_init_f()
44 out_be32(&immr->im_sitk.sitk_tbk, KAPWR_KEY); in cpu_init_f()
46 /* initialize the PIT (11-31) */ in cpu_init_f()
48 out_be32(&immr->im_sitk.sitk_piscrk, KAPWR_KEY); in cpu_init_f()
49 out_be16(&immr->im_sit.sit_piscr, CONFIG_SYS_PISCR); in cpu_init_f()
51 /* System integration timers. Don't change EBDF! (15-27) */ in cpu_init_f()
53 out_be32(&immr->im_clkrstk.cark_sccrk, KAPWR_KEY); in cpu_init_f()
54 clrsetbits_be32(&immr->im_clkrst.car_sccr, ~CONFIG_SYS_SCCR_MASK, in cpu_init_f()
70 reg = in_be32(&immr->im_clkrst.car_sccr); in cpu_init_f()
73 clrbits_be32(&immr->im_clkrst.car_sccr, SCCR_EBDF11); in cpu_init_f()
74 setbits_be32(&immr->im_clkrst.car_sccr, SCCR_EBDF01); in cpu_init_f()
77 /* PLL (CPU clock) settings (15-30) */ in cpu_init_f()
79 out_be32(&immr->im_clkrstk.cark_plprcrk, KAPWR_KEY); in cpu_init_f()
90 out_be32(&immr->im_clkrst.car_plprcr, CONFIG_SYS_PLPRCR); in cpu_init_f()
91 else /* isolate MF-related fields and reset control bits */ in cpu_init_f()
92 clrsetbits_be32(&immr->im_clkrst.car_plprcr, ~PLPRCR_MFACT_MSK, in cpu_init_f()
101 clrsetbits_be32(&memctl->memc_br0, ~BR_PS_MSK, BR_V); in cpu_init_f()
104 * preliminary addresses - these have to be modified later in cpu_init_f()
124 * I owe him a free beer. - wd] in cpu_init_f()
128 out_be32(&memctl->memc_or0, CONFIG_SYS_OR0_REMAP); in cpu_init_f()
131 out_be32(&memctl->memc_or1, CONFIG_SYS_OR1_REMAP); in cpu_init_f()
134 out_be32(&memctl->memc_or5, CONFIG_SYS_OR5_REMAP); in cpu_init_f()
138 out_be32(&memctl->memc_br0, CONFIG_SYS_BR0_PRELIM); in cpu_init_f()
139 out_be32(&memctl->memc_or0, CONFIG_SYS_OR0_PRELIM); in cpu_init_f()
142 out_be32(&memctl->memc_or1, CONFIG_SYS_OR1_PRELIM); in cpu_init_f()
143 out_be32(&memctl->memc_br1, CONFIG_SYS_BR1_PRELIM); in cpu_init_f()
147 out_be32(&memctl->memc_or2, CONFIG_SYS_OR2_PRELIM); in cpu_init_f()
148 out_be32(&memctl->memc_br2, CONFIG_SYS_BR2_PRELIM); in cpu_init_f()
152 out_be32(&memctl->memc_or3, CONFIG_SYS_OR3_PRELIM); in cpu_init_f()
153 out_be32(&memctl->memc_br3, CONFIG_SYS_BR3_PRELIM); in cpu_init_f()
157 out_be32(&memctl->memc_or4, CONFIG_SYS_OR4_PRELIM); in cpu_init_f()
158 out_be32(&memctl->memc_br4, CONFIG_SYS_BR4_PRELIM); in cpu_init_f()
162 out_be32(&memctl->memc_or5, CONFIG_SYS_OR5_PRELIM); in cpu_init_f()
163 out_be32(&memctl->memc_br5, CONFIG_SYS_BR5_PRELIM); in cpu_init_f()
167 out_be32(&memctl->memc_or6, CONFIG_SYS_OR6_PRELIM); in cpu_init_f()
168 out_be32(&memctl->memc_br6, CONFIG_SYS_BR6_PRELIM); in cpu_init_f()
172 out_be32(&memctl->memc_or7, CONFIG_SYS_OR7_PRELIM); in cpu_init_f()
173 out_be32(&memctl->memc_br7, CONFIG_SYS_BR7_PRELIM); in cpu_init_f()
179 out_be16(&immr->im_cpm.cp_cpcr, CPM_CR_RST | CPM_CR_FLG); in cpu_init_f()
181 while (in_be16(&immr->im_cpm.cp_cpcr) & CPM_CR_FLG) in cpu_init_f()
186 * initialize higher level parts of CPU like timers